A 0.6-V dynamic biasing filter with 89-dB dynamic range in 0.18-μm CMOS

IEEE Journal of Solid-State Circuits

Volumn 44, Issue 10, 2009, Pages 2790-2799

  Akita, Ippei ^a   Wada, Kazuyuki ^b   Tadokoro, Yoshiaki ^b  

^a TOSHIBA CORPORATION   (Japan)

^b TOYOHASHI UNIVERSITY OF TECHNOLOGY   (Japan)

Author keywords

Continuous time filter; Dynamic biasing (DB) technique; Low voltage analog circuit; Wide dynamic range

Indexed keywords

AUTOMATIC FREQUENCY TUNING; CONTINUOUS-TIME FILTER; DYNAMIC BIASING; DYNAMIC BIASING (DB) TECHNIQUE; DYNAMIC RANGE; IN-BAND; INTERNAL NODES; LOW-VOLTAGE ANALOG CIRCUIT; POWER SUPPLY; STANDARD CMOS TECHNOLOGY; STATE VARIABLES; SUPPLY VOLTAGES; VOLTAGE REFERENCE; VOLTAGE-CONTROLLED; WIDE DYNAMIC RANGE;

ANALOG TO DIGITAL CONVERSION; CMOS INTEGRATED CIRCUITS; CONTINUOUS TIME SYSTEMS; ELECTRIC FILTERS; INTEGRATED CIRCUITS;

LOW PASS FILTERS;

EID: 70350594039     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2009.2028049     Document Type: Article

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