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0.5-V analog circuit techniques and their application in OTA and filter design
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Adaptive analog IF signal processor for a wideband CMOS wireless receiver
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F. Behbahani, A. Karimi-Sanjaani, W. Tan, A. Roithmeier, J.C. Leete, K. Hoshino, and A.A. Abidi, "Adaptive analog IF signal processor for a wideband CMOS wireless receiver," IEEE J. Solid-State Circuits, vol.36, no.8, pp. 1205-1217, Aug. 2001.
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Externally linear, time-invariant systems and their application to companding signal processors
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Feb.
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Internally varying analog circuits minimize power dissipation
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Jan.
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Y. Tsividis, N. Krishnapura, Y. Palaskas, and L. Toth, "Internally varying analog circuits minimize power dissipation," IEEE Circuits Devices Mag., vol.19, no.1, pp. 63-72, Jan. 2003.
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Low-voltage log-domain signal processing in CMOS and BiCMOS
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A micropower class-AB CMOS log-domain filter for DECT application
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July
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D. Python and C. Enz, "A micropower class-AB CMOS log-domain filter for DECT application," IEEE J. Solid-State Circuits, vol.36, no.7, pp. 1067-1075, July 2001.
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A 1.2-V N-P-N-Only integrator for log-domain filtering
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M.N. El-Gamal and G.W. Roberts, "A 1.2-V N-P-N-Only integrator for log-domain filtering," IEEE Trans. Circuits Syst. II, vol.49, no.4, pp. 257-265, April 2002.
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Simplified technique for syllabic companding in log-domain filters
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July
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N. Krishnapura, Y. Tsividis, and D.R. Frey, "Simplified technique for syllabic companding in log-domain filters," Electron. Lett., vol.36, pp. 1257-1259, July 2000.
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Noise and power reduction in filters through the use of adjustable biasing
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N. Krishnapura and Y. Tsividis, "Noise and power reduction in filters through the use of adjustable biasing," IEEE J. Solid-State Circuits, vol.36, no.12, pp. 1912-1920, Dec. 2001.
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Design considerations and experimental evaluation of a syllabic companding audio frequency filter
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G. Palaskas and Y. Tsividis, "Design considerations and experimental evaluation of a syllabic companding audio frequency filter," Proc. 2002 Int. Symp. Circuits and Systems, vol.3, pp. 305-308, 2002.
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Low-voltage CMOS syllabiccompanding log domain filter
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I. Akita, K. Wada, and Y. Tadokoro, "Low-voltage CMOS syllabiccompanding log domain filter," Proc. 2006 IEEE Int. Symp. Circuits and Systems, pp. 3337-3340, 2006.
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A divide and conquer" technique for implementing wide dynamic range continuous-time filters
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Feb.
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Y. Palaskas, Y. Tsividis, V. Prodanov, and V. Boccuzzi, "A "divide and conquer" technique for implementing wide dynamic range continuous-time filters," IEEE J. Solid-State Circuits, vol.39, no.2, pp. 297-307, Feb. 2004.
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Palaskas, Y.1
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14
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Dynamic power optimization of active filters with application to zero-IF receivers
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June
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M.T. Ozgun, Y. Tsividis, and G. Burra, "Dynamic power optimization of active filters with application to zero-IF receivers," IEEE J. Solid-State Circuits, vol.41, no.6, pp. 1344-1352, June 2006.
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