A low-power wideband reconfigurable integrated active-RC filter with 73 dB SFDR

IEEE Journal of Solid-State Circuits

Volumn 41, Issue 9, 2006, Pages 1997-2008

  Vasilopoulos, Athanasios ^a,b   Vitzilaios, Georgios ^b   Theodoratos, Gerasimos ^a,b   Papananos, Yannis ^a,b  

^a IEEE   (Greece)

^b NATIONAL TECHNICAL UNIVERSITY OF ATHENS   (Greece)

Author keywords

Active RC filter; Compensation technique; Low power; Operational amplifiers; Programmable resistor arrays; Tuning circuit

Indexed keywords

ACTIVE-RC FILTER; COMPENSATION TECHNIQUE; LOW POWER; PROGRAMMABLE RESISTOR ARRAYS; TUNING CIRCUIT;

BANDWIDTH; ELECTRIC CURRENTS; OPERATIONAL AMPLIFIERS; POLYSILICON; RESISTORS; TUNING;

ELECTRIC FILTERS;

EID: 33748363304     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2006.880616     Document Type: Article

References (22)

1. W. Hioe, T. Oshima, Y. Shibahara, T. Doi, K. Ozaki, and S. Arayashiki, "0.18-μm CMOS Bluetooth analog receiver with -88-dBm sensitivity," IEEE J. Solid-State Circuits, vol. 39, no. 2, pp. 374-377, Feb. 2004.
2. A. Pärssinen, J. Jussila, J. Ryynänen,L. Sumanen, and K. A. I. Halonen, "A 2-GHz wideband direct conversion receiver for WCDMA applications," IEEE J. Solid-State Circuits, vol. 34, no. 12, pp. 1893-1903, Dec. 1999.
3. S.-S. Lee and C. A. Laber, "A BiCMOS continuous-time filter for video signal processing applications," IEEE J. Solid-State Circuits, vol. 33, no. 9, pp. 1373-1382, Sep. 1998.
4. W. Dehaene, M. S. J. Steyaert, and W. Sansen, "A 50-MHz standard CMOS pulse equalizer for hard disk read channels," IEEE J. Solid-State Circuits, vol. 32, no. 7, pp. 977-988, Jul. 1997.
5. m-C filter for PRML read channel applications at 150 Mb/s and beyond," IEEE J. Solid-State Circuits, vol. 32, no. 4, pp. 499-513, Apr. 1997.
6. J. Silva-Martínez, J. Adut, J. M. Rocha-Perez, M. Robinson, and S. Rokhsaz, "A 60-mW 200-MHz continuous-time seventh-order linear phase filter with on-chip automatic tuning system," IEEE J. Solid-State Circuits, vol. 38, no. 2, pp. 216-225, Feb. 2003.
7. J. Silva-Martínez, M. S. J. Steyaert, and W. Sansen, "A 10.7-MHz 68-dB SNR CMOS continuous-time filter with on-chip automatic tuning," IEEE J. Solid-State Circuits, vol. 27, no. 12, pp. 1843-1853, Dec. 1992.
8. J. M. Khoury, "Design of a 15-MHz CMOS continuous-time filter with on-chip tuning," IEEE J. Solid-State Circuits, vol. 26, no. 12, pp. 1988-1997, Dec. 1991.
9. F. Krummenacher and N. Joehl, "A 4-MHz CMOS continuous-time filter with on-chip automatic tuning," IEEE J. Solid-State Circuits, vol. 23, no. 6, pp. 750-758, Jun. 1988.
10. M. Ismail, S. V. Smith, and R. G. Beale, "A new MOSFET-C universal filter structure for VLSI," IEEE J. Solid-State Circuits, vol. 23, no. 2, pp. 183-194, Feb. 1988.
11. R. Castello, F. Montecchi, F. Rezzi, and A. Baschirotto, "Low-voltage analog filters," IEEE Trans. Circuits Syst. I, Fundam. Theory Applicat., vol. 42, no. 11, pp. 827-840, Nov. 1995.
12. Y. P. Tsividis, "Integrated continuous-time filter design - An overview," IEEE J. Solid-State Circuits, vol. 29, no. 3, pp. 166-176, Mar. 1994.
13. A. Yoshisawa and Y. P. Tsividis, "Anti-blocker design techniques for MOSFET-C filters for direct conversion receivers," IEEE J. Solid-State Circuits, vol. 37, no. 3, pp. 357-364, Mar. 2002.
14. T. Oshima, K. Maio, W. Hioe, and Y. Shibahara, "Novel automatic tuning method of RC filters using a digital-DLL technique," IEEE J. Solid-State Circuits, vol. 39, no. 11, pp. 2052-2054, Nov. 2004.
15. H. Huang and E. K. F. Lee, "Design of low-voltage CMOS continuous-time filter with on-chip automatic tuning," IEEE J. Solid-State Circuits, vol. 36, no. 8, pp. 1168-1177, Aug. 2001.
16. A. M. Durham and W. Redman-White, "Integrated continuous-time balanced filters for 16-b DSP interfaces," IEEE J. Solid-State Circuits, vol. 28, no. 7, pp. 835-839, Jul. 1993.
17. A. M. Durham, J. B. Hughes, and W. Redman-White, "Circuit architectures for high linearity monolithic continuous-time filtering," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 39, no. 9, pp. 651-657, Sep. 1992.
18. A. A. Emira and E. Sánchez-Sinencio, "A pseudo differential complex filter for Bluetooth with frequency tuning," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 50, no. 10, pp. 742-754, Oct. 2003.
19. J. O. Voorman, A. van Bezooijen, and N. Ramalho, "On balanced integrator filters," in Integrated Continuous-Time Filters: Principles, Design, and Applications, Y. P. Tsividis and J. O. Voorman, Eds. New York: IEEE Press, 1993, pp. 66-86.
20. Y. P. Tsividis, Mixed Analog-Digital VLSI Devices and Technology: An Introduction. New York: McGraw-Hill, 1996, pp. 205-257.
21. M. Vadipour, "Capacitive feedback technique for wideband amplifiers," IEEE J. Solid-State Circuits, vol. 28, no. 1, pp. 90-92, Jan. 1993.
22. R. D. Middlebrook, "Measurement of loop gain in feedback systems," Int. J. Electron., vol. 38, pp. 485-512, Apr. 1975.