A "divide and conquer" technique for implementing wide dynamic range continuous-time filters

IEEE Journal of Solid-State Circuits

Volumn 39, Issue 2, 2004, Pages 297-307

  Palaskas, Yorgos ^a   Tsividis, Yannis ^a   Prodanov, Vladimir ^b   Boccuzzi, Vito ^b  

^a Och Spine at New York Presbyterian Hospitals   (United States)

^b AGERE SYSTEMS   (United States)

Author keywords

Analog filters; Automatic gain control (AGC); Channel selection filters; Companding

Indexed keywords

AMPLIFIERS (ELECTRONIC); CAPACITANCE; CMOS INTEGRATED CIRCUITS; GAIN CONTROL; LOCAL AREA NETWORKS; MICROPROCESSOR CHIPS; SIGNAL DISTORTION; SIGNAL TO NOISE RATIO; WIRELESS TELECOMMUNICATION SYSTEMS;

ANALOG FILTERS; AUTOMATIC GAIN CONTROL; CHANNEL SELECTION FILTERS; COMPANDING;

DIGITAL FILTERS;

EID: 1242308369     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2003.821780     Document Type: Article

References (19)

1. Y. Palaskas and Y. Tsividis, "Power-area-DR-frequency-selectivity tradeoffs in weakly nonlinear filters," in Proc. IEEE Int. Symp. Circuits and Systems, vol. 1, Bangkok, Thailand, 2003, pp. I453-I456.
2. E. Vittoz, "Future of analog in the VLSI environment," in Proc. IEEE Int. Symp. Circuits and Systems, New Orleans, LA, 1990, pp. 1372-1375.
3. F. Behbahani, A. Karimi-Sanjaani, W. Tan, A. Roithmeier, J. Leete, K. Hoshino, and A. Abidi, "Adaptive analog IF signal processor for a wide-band CMOS wireless receiver," IEEE J. Solid-State Circuits, vol. 36, pp. 1205-1217, Aug. 2001.
4. G. Palaskas and Y. Tsividis, "A "divide and conquer" technique for the design of wide dynamic range continuous-time filters," in Proc. IEEE Int. Symp. Circuits and Systems, vol. 1, Sydney, Australia, May 2001, pp. 252-255.
5. Y. Palaskas and Y. Tsividis, "Dynamic range optimization of weakly nonlinear, fully balanced, Gm-C filters with power dissipation constraints," IEEE Trans. Circuits Syst. II, vol. 50, pp. 714-727, Oct. 2003.
6. G. Palaskas, "Syllabic companding filters with emphasis on wireless applications," Ph.D. dissertation, Columbia Univ., New York, NY, 2003.
7. J. Crols and M. Steyaert, "Low-IF topologies for high performance analog front ends of fully integrated receivers," IEEE Trans. Circuits Syst. II, vol. 45, pp. 269-282, Mar. 1998.
8. P. Andreani, S. Mattisson, and B. Essink, "A CMOS gm-C polyphase filter with high image band rejection," in Proc. Eur. Solid-State Circuits Conf., Stockholm, Sweden, Sept. 2000, pp. 244-247.
9. K. Koli and K. Halonen, "Low voltage MOS-transistor-only precision current peak detector with signal independent discharge time constant," in Proc. IEEE Int. Symp. Circuits and Systems, vol. 3, Hong Kong, June 1997, pp. 1992-1995.
10. V. Prodanov, G. Palaskas, J. Glas, and V. Boccuzzi, "A CMOS AGC-less IF strip for Bluetooth," in Proc. Eur. Solid-State Circuits Conf., Villach, Austria, Sept. 2001, pp. 488-491.
11. C. Laber and P. Gray, "A 20-MHz sixth-order BiCMOS parasitic-insensitive continuous-time filter and second-order equalizer optimized for disk-drive read channels," IEEE J. Solid-State Circuits, vol. 28, pp. 462-470, Apr. 1993.
12. F. Krummenacher and N. Joel, "A 4 MHz CMOS continuous time filter with on-chip automatic tuning," IEEE J. Solid-State Circuits, vol. 23, pp. 750-757, June 1988.
13. J. Silva-Martinez, M. Steyaert, and W. Sansen, "A 10.7-MHz 68-dB SNR CMOS continuous-time filter with on-chip automatic tuning," IEEE J. Solid-State Circuits, vol. 27, pp. 1843-1853, Dec. 1992.
14. T. Itakura, T. Ueno, H. Tanimoto, A. Yasuda, R. Fujimoto, T. Arai, and H. Kokatsu, "A 2.7-V, 200-kHz, 49-dBm, stopband-IIP3, low-noise, fully balanced gm-C filter 1C," IEEE J. Solid-State Circuits, vol. 34, pp. 1155-1159, Aug. 1999.
15. B. Razavi, Design of Analog CMOS Integrated Circuits. New York: McGraw-Hill, 2000.
16. J. O. Voorman, A. van Bezooijen, and N. Ramahlo, "On balanced integrator filters," in Integrated Continuous-Time Filters, Y. Tsividis and J. O. Voorman, Eds. New York, NY: IEEE Press, 1993.
17. B. S. Song and P. Gray, "Switched-capacitor high-Q bandpass filters for IF applications," IEEE J. Solid-State Circuits, vol. 21, pp. 924-933, Dec. 1986.
18. H. Khorramabadi and P. Gray, "High-frequency CMOS continuous time filters," IEEE J. Solid-State Circuits, vol. 19, pp. 939-948, Dec. 1984.
19. A. Yoshizawa and Y. Tsividis, "Anti-blocker design techniques for MOSFET-C filters for direct conversion receivers," IEEE J. Solid-State Circuits, vol. 37, pp. 357-364, Mar. 2002.