Self-consistent Schrödinger-Poisson simulations on capacitance-voltage characteristics of silicon nanowire gate-all-around MOS devices with experimental comparisons

IEEE Transactions on Electron Devices

Volumn 56, Issue 10, 2009, Pages 2312-2318

  Chin, S K ^a   Ligatchev, Valeri ^a   Rustagi, Subhash C ^b   Zhao, Hui ^b,c   Samudra, Ganesh S ^c   Singh, Navab ^b   Lo, G Q ^b   Kwong, Dim Lee ^b  

^a INSTITUTE OF HIGH PERFORMANCE COMPUTING   (Singapore)

^b INSTITUTE OF MICROELECTRONICS   (Singapore)

^c NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

Author keywords

Capacitance; Gate all around; MOS; Schr dinger Poisson (SP); Silicon (Si) nanowire

Indexed keywords

ANALYTICAL MODEL; CAPACITANCE VOLTAGE CHARACTERISTIC; CYLINDRICAL COORDINATES; DENSITY-OF-STATES; EXPERIMENTAL COMPARISON; GATE-ALL-AROUND; MOS; MOS STRUCTURE; NMOS DEVICES; POISSON SOLVERS; ROOM TEMPERATURE; SI NANOWIRE; SILICON NANOWIRES; SIMULATION RESULT; SYNOPSYS;

CAPACITANCE; CAPACITANCE MEASUREMENT; MOS DEVICES; NANOWIRES; POISSON DISTRIBUTION; POISSON EQUATION; TEMPERATURE MEASUREMENT;

SEMICONDUCTING SILICON;

EID: 70350211450     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2009.2028402     Document Type: Article

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