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Volumn , Issue , 2009, Pages 1092-1097

The Impacts of dimensions and return current path geometry on coupling in single ended through silicon vias

Author keywords

[No Author keywords available]

Indexed keywords

ANALYTICAL MODEL; FULL-WAVE SIMULATIONS; LUMPED ELEMENT EQUIVALENT CIRCUIT; MICROELECTRONICS PACKAGING; NEAR END CROSS TALKS; RETURN CURRENT PATHS; SINGLE-ENDED; THROUGH SILICON VIAS;

EID: 70349675199     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.2009.5074148     Document Type: Conference Paper
Times cited : (16)

References (10)
  • 1
    • 27944462287 scopus 로고    scopus 로고
    • Silicon based system-in-package: A passive integration technology combined with advanced packaging and system based design tools to allow a breakthrough in miniaturization
    • F. Murray, "Silicon Based System-in-package: A Passive Integration Technology Combined with Advanced Packaging and System Based Design Tools to Allow a Breakthrough in Miniaturization", 2008 IEEE Bipolar/BiCMOS Circuits and Technology Meeting 2005.
    • (2005) 2008 IEEE Bipolar/BiCMOS Circuits and Technology Meeting
    • Murray, F.1
  • 2
    • 25844453501 scopus 로고    scopus 로고
    • Development of next-generation system-on-package (sop) technology based on silicon carriers with fine-pitch chip interconnection
    • July/September
    • J. U. Knickerbocker, "Development of Next-generation System-on-package (SOP) Technology Based on Silicon Carriers with Fine-pitch Chip Interconnection", IBM Journal of Research and Technology, IBM J. Res. & Dev. Vol. 49 No. 4/5 July/September 2005.
    • (2005) IBM Journal of Research and Technology, IBM J. Res. & Dev. , vol.49 , Issue.4-5
    • Knickerbocker, J.U.1
  • 3
    • 51249113887 scopus 로고    scopus 로고
    • Electrical characterization of trough silicon via (tsv) depending on structural and material parameters based on 3d full wave simulation
    • EMAP 2007, Nov 2007
    • J. S. Pak, C. Ryu, J. Kim, "Electrical characterization of trough silicon via (TSV) depending on structural and material parameters based on 3D full wave simulation", International Conference on Electronic Materials and Packaging, 2007, EMAP 2007, Pages 1-6, Nov. 2007.
    • (2007) International Conference on Electronic Materials and Packaging , pp. 1-6
    • Pak, J.S.1    Ryu, C.2    Kim, J.3
  • 5
    • 50249151500 scopus 로고    scopus 로고
    • Development of coaxial shield via in silicon carrier for high frequency application
    • EPTC '06, Dec. 2006
    • Soon Wee Ho; Vempati Srinivasa Rao; Qratti Kalandar Navas Khan; Seung Uk Yoon; Kripesh, V., "Development of coaxial shield via in silicon carrier for high frequency application", 8th Electronics Packaging Technology Conference, 2006, EPTC '06, Pg. 825 - 830, Dec. 2006.
    • (2006) 8th Electronics Packaging Technology Conference , pp. 825-830
    • Kripesh, V.1    Ho, S.W.2    Rao, V.S.3    Khan, Q.K.N.4    Yoon, S.U.5
  • 7
    • 47849120494 scopus 로고    scopus 로고
    • Modeling & measurement of mutual coupling resulting from via structures within printed circuit boards
    • EMC 2007, IEEE International Symposium on, 9- 13 July 2007
    • Modeling & Measurement of Mutual Coupling Resulting from via Structures Within Printed Circuit Boards, Cornock, L.; Dilworth, I.; Electromagnetic Compatibility, 2007, EMC 2007, IEEE International Symposium on, 9- 13 July 2007 Page(s):1 - 5.
    • (2007) Electromagnetic Compatibility , pp. 1-5
    • Cornock, L.1    Dilworth, I.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.