IR thermography and FEM simulation analysis of on-chip temperature during thermal-cycling power-metal reliability testing using in situ heated structures

Microelectronics Reliability

Volumn 49, Issue 9-11, 2009, Pages 1132-1136

  Köck, Helmut ^a,b   Košel, Vladimir ^a,c   Djelassi, Christian ^a   Glavanovics, Michael ^a   Pogany, Dionyz ^b  

^a Kompetenzzentrum Automobil und Industrie Elektronik Gmbh   (Austria)

^b VIENNA UNIVERSITY OF TECHNOLOGY   (Austria)

^c SLOVAK UNIVERSITY OF TECHNOLOGY   (Slovakia)

Author keywords

[No Author keywords available]

Indexed keywords

FEM SIMULATIONS; FINITE ELEMENT SIMULATIONS; HIGH ENERGY PULSE; HOT SPOT; IN-SITU; INFRA-RED CAMERAS; IR THERMOGRAPHY; ON-CHIP TEMPERATURE; RELIABILITY TESTING; SINGLE SHOTS; SMART POWER TECHNOLOGIES; TEST STRUCTURE;

FAILURE ANALYSIS; METAL ANALYSIS; METAL TESTING; POLYSILICON; QUALITY ASSURANCE; REMOTE SENSING; SAFETY FACTOR;

RELIABILITY ANALYSIS;

EID: 69249232013     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.microrel.2009.06.032     Document Type: Article

References (11)

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