The effect of interface thickness of high-k/metal gate stacks on NFET dielectric reliability

IEEE International Reliability Physics Symposium Proceedings

Volumn , Issue , 2009, Pages 510-513

  Linder, Barry P ^a   Cartier, Eduard ^a   Krishnan, Siddarth ^a   Stathis, James H ^a   Kerber, Andreas ^b  

^a IBM T J WATSON RESEARCH CENTER   (United States)

^b ADVANCED MICRO DEVICES   (United States)

Author keywords

Component; Dielectric breakdown; Hafnium; Ramp breakdown; Semiconductor device reliability

Indexed keywords

BREAKDOWN TESTS; BREAKDOWN VOLTAGE; COMPONENT; DIELECTRIC BREAKDOWN; DIELECTRIC RELIABILITY; GATE LEAKAGES; GATE STACKS; INTERFACE GROWTH; INTERFACE LAYER; INTERFACE THICKNESS; NITROGEN CONTENT; RAMP BREAKDOWN; RELIABILITY PARAMETERS; SEMICONDUCTOR DEVICE RELIABILITY; WEIBULL SLOPE;

ELECTRIC BREAKDOWN; HAFNIUM; LEAKAGE CURRENTS; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR GROWTH; SEMICONDUCTOR SWITCHES;

RELIABILITY;

EID: 67650464391     PISSN: 15417026     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IRPS.2009.5173305     Document Type: Conference Paper

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