메뉴 건너뛰기




Volumn , Issue , 2008, Pages 71-74

Configurable error correction for multi-wire errors in switch-to-switch SOC links

Author keywords

[No Author keywords available]

Indexed keywords

AREA OVERHEAD; CODING SCHEME; CONFIGURABLE; ENERGY EFFICIENT; ERROR RATE; ERROR-CORRECTION SCHEMES; INTERLEAVER; NOISE CONDITIONS; ORDER OF MAGNITUDE; POWER IMPROVEMENTS;

EID: 67650251277     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SOCC.2008.4641482     Document Type: Conference Paper
Times cited : (3)

References (11)
  • 1
    • 33745800231 scopus 로고    scopus 로고
    • A survey of research and practices of network-on-chip
    • Mar
    • T. Bjerregaard and S. Mahadevan, "A survey of research and practices of network-on-chip," ACM Computing Surveys, vol. 38, pp. 1-51, Mar. 2006.
    • (2006) ACM Computing Surveys , vol.38 , pp. 1-51
    • Bjerregaard, T.1    Mahadevan, S.2
  • 2
    • 0034245046 scopus 로고    scopus 로고
    • Toward achieving energy efficiency in presence of deep submicron noise
    • Aug
    • R. Hegde and N. R. Shanbhag, "Toward achieving energy efficiency in presence of deep submicron noise," IEEE Trans. Very Large Scale Integration (VLSI) Syst., vol. 8, no. 4, pp. 379-391, Aug. 2000.
    • (2000) IEEE Trans. Very Large Scale Integration (VLSI) Syst , vol.8 , Issue.4 , pp. 379-391
    • Hegde, R.1    Shanbhag, N.R.2
  • 4
    • 20444467586 scopus 로고    scopus 로고
    • D. Bertozzi, L. Benini, and G. De Micheli, Error control scheme for on-chip communication links: the energy-reliability tradeoff, IEEE Trans. Computer-Aided Design of Integrated Circuits and Syst., 24, no. 6, pp. 818-831, June 2005.
    • D. Bertozzi, L. Benini, and G. De Micheli, "Error control scheme for on-chip communication links: the energy-reliability tradeoff," IEEE Trans. Computer-Aided Design of Integrated Circuits and Syst., vol. 24, no. 6, pp. 818-831, June 2005.
  • 8
    • 34250849255 scopus 로고    scopus 로고
    • Online reconfigurable self-timed links for fault tolerant
    • Article ID 94676, pp
    • T. Lehtonen, P. Liljeberg, and J. Plosila, "Online reconfigurable self-timed links for fault tolerant NoC," VLSI Design, vol. 2007, Article ID 94676, pp. 1-13, 2007.
    • (2007) VLSI Design , vol.2007 , pp. 1-13
    • Lehtonen, T.1    Liljeberg, P.2    Plosila, J.3
  • 9
    • 40949110161 scopus 로고    scopus 로고
    • Design of low power & reliable networks on chip through joint crosstalk avoidance and multiple error correction coding
    • Jan
    • A. Ganguly, P. P. Pande, B. Belzer and C. Grecu, "Design of low power & reliable networks on chip through joint crosstalk avoidance and multiple error correction coding," J. Electronic Testing, vol. 24, no. 1, pp. 67-81, Jan. 2008.
    • (2008) J. Electronic Testing , vol.24 , Issue.1 , pp. 67-81
    • Ganguly, A.1    Pande, P.P.2    Belzer, B.3    Grecu, C.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.