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Volumn , Issue , 2005, Pages 5862-5865

Coupling reduction analysis of bus-invert coding

Author keywords

[No Author keywords available]

Indexed keywords

BUS INVERT CODING; BUS TRANSFER; CLOSED FORM; SWITCHING ACTIVITIES; THEORETICAL FOUNDATIONS;

EID: 67649112319     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2005.1465972     Document Type: Conference Paper
Times cited : (11)

References (23)
  • 1
    • 0003713065 scopus 로고
    • Integrated circuit having outputs configured for reduced state changes,
    • U.S. Patent 4,667,337, May
    • R. J. Fletcher, "Integrated circuit having outputs configured for reduced state changes," U.S. Patent 4,667,337, May 1987.
    • (1987)
    • Fletcher, R.J.1
  • 2
    • 35048834531 scopus 로고
    • Bus-invert coding for low power I/O
    • March
    • M. R. Stan and W. P. Burleson, "Bus-invert coding for low power I/O," IEEE Trans. on VLSI, Vol. 3, No. 1, pp. 49-58, March 1995.
    • (1995) IEEE Trans. on VLSI , vol.3 , Issue.1 , pp. 49-58
    • Stan, M.R.1    Burleson, W.P.2
  • 3
    • 0031342532 scopus 로고    scopus 로고
    • Low-power encodings for global communication in CMOS VLSI
    • Dec
    • M. R. Stan and W. P. Burleson, "Low-power encodings for global communication in CMOS VLSI," IEEE Trans. on VLSI Systems, Vol. 5, No.4, pp. 444-455, Dec. 1997.
    • (1997) IEEE Trans. on VLSI Systems , vol.5 , Issue.4 , pp. 444-455
    • Stan, M.R.1    Burleson, W.P.2
  • 4
    • 0032628047 scopus 로고    scopus 로고
    • A coding framework for low-power address and data buses
    • June
    • S. Ramprasad, N. R. Shanbhag, and I. N. Hajj, "A coding framework for low-power address and data buses," IEEE Trans. on VLSI Systems, Vol. 7, No. 2, pp. 212-221, June 1999.
    • (1999) IEEE Trans. on VLSI Systems , vol.7 , Issue.2 , pp. 212-221
    • Ramprasad, S.1    Shanbhag, N.R.2    Hajj, I.N.3
  • 6
    • 0035211961 scopus 로고    scopus 로고
    • Bus encoding to prevent crosstalk
    • Nov
    • B. Victor and K. Keutzer, "Bus encoding to prevent crosstalk," ICCAD, pp. 57-64, Nov. 2001.
    • (2001) ICCAD , pp. 57-64
    • Victor, B.1    Keutzer, K.2
  • 7
    • 0033889723 scopus 로고    scopus 로고
    • EXODUS: Inter-module bus-encoding scheme for system-on-a-chip
    • March
    • K. -H. Baek, K. -W Kim, and S. -M. Kang, "EXODUS: Inter-module bus-encoding scheme for system-on-a-chip," Electronics Letters, pp. 615-617, No. 7, Vol. 36, March 2000.
    • (2000) Electronics Letters , vol.36 , Issue.7 , pp. 615-617
    • Baek, K.-H.1    Kim, K.-W.2    Kang, S.-M.3
  • 8
    • 84949437176 scopus 로고    scopus 로고
    • Low power bus encoding with crosstalk delay elimination
    • Sept
    • C. -G. Lyuh and T. Kim, "Low power bus encoding with crosstalk delay elimination," ASIC/SOC, pp. 389-393, Sept. 2002.
    • (2002) ASIC/SOC , pp. 389-393
    • Lyuh, C.-G.1    Kim, T.2
  • 11
    • 13444258261 scopus 로고    scopus 로고
    • ETAM++: Extended transition activity measure for low power address bus designs
    • Jan
    • H. Lekatsas and J. Henkel, "ETAM++: extended transition activity measure for low power address bus designs," Intl. Conf. on VLSI Design, Jan. 2002.
    • (2002) Intl. Conf. on VLSI Design
    • Lekatsas, H.1    Henkel, J.2
  • 13
    • 50549093061 scopus 로고    scopus 로고
    • Combining wire swapping and spacing for low-power deep-submicrom buses
    • April
    • E. Macii, M. Poncino, and S. Salerno, "Combining wire swapping and spacing for low-power deep-submicrom buses," Great Lakes Symposium on VLSI, pp. 77-82, April 2003.
    • (2003) Great Lakes Symposium on VLSI , pp. 77-82
    • Macii, E.1    Poncino, M.2    Salerno, S.3
  • 14
    • 67649109585 scopus 로고    scopus 로고
    • Wong and Tsui, Re-configurable bus encoding scheme for reducing power consumption of cross coupling capacitance for deep sub-micron instruction bus, DATE, 2004.
    • Wong and Tsui, "Re-configurable bus encoding scheme for reducing power consumption of cross coupling capacitance for deep sub-micron instruction bus," DATE, 2004.
  • 15
    • 84893812369 scopus 로고    scopus 로고
    • Petrov and Orailoglu, Power efficiency through application-specific instruction memory transformation, DATE, pp. 30-35, 2003.
    • Petrov and Orailoglu, "Power efficiency through application-specific instruction memory transformation," DATE, pp. 30-35, 2003.
  • 16
    • 0038082045 scopus 로고    scopus 로고
    • On optimizing power and crosstalk for bus coupling capacitance using genetic algorithms
    • May
    • E. Naroska, S. -J. Ruan, F. Lai, U. Schwiegelshohn, and L. -C. Liu, "On optimizing power and crosstalk for bus coupling capacitance using genetic algorithms," ISCAS, pp. V-277-V-280, May 2003.
    • (2003) ISCAS
    • Naroska, E.1    Ruan, S.-J.2    Lai, F.3    Schwiegelshohn, U.4    Liu, L.-C.5
  • 17
    • 0346500588 scopus 로고    scopus 로고
    • Coupling-aware high-level interconnect synthesis
    • 23, pp, Jan
    • C. -G. Lyuh, T. Kim, and K. -W. Lim, "Coupling-aware high-level interconnect synthesis," IEEE Trans. on CAD, No. 1, Vol. 23, pp. 157-164, Jan. 2004.
    • (2004) IEEE Trans. on CAD , vol.1 , pp. 157-164
    • Lyuh, C.-G.1    Kim, T.2    Lim, K.-W.3
  • 18
    • 0034483997 scopus 로고    scopus 로고
    • Coupling-driven signal encoding scheme for low-power interface design
    • Nov
    • K. -W. Kim, K. -H, Baek, N. Shanbhag, C. L. Liu, and S. -M. Kang, "Coupling-driven signal encoding scheme for low-power interface design," ICCAD, pp. 318-321, Nov. 2000.
    • (2000) ICCAD , pp. 318-321
    • Kim, K.-W.1    Baek, K.-H.2    Shanbhag, N.3    Liu, C.L.4    Kang, S.-M.5
  • 19
    • 0036949310 scopus 로고    scopus 로고
    • Odd/even bus invert with two-phase transfer for buses with coupling
    • Y. Zhang, J. Lach, K. Skadron, and M. R. Stan, "Odd/even bus invert with two-phase transfer for buses with coupling," ISLPED, pp. 80-83, 2002.
    • (2002) ISLPED , pp. 80-83
    • Zhang, Y.1    Lach, J.2    Skadron, K.3    Stan, M.R.4
  • 20
    • 3042517120 scopus 로고    scopus 로고
    • M. Lampropoulos, B. Al-Hashimi, and P. Rosinger, Minimization of crosstalk noise, delay and power using a modified bus invert technique, DATE, 2004.
    • M. Lampropoulos, B. Al-Hashimi, and P. Rosinger, "Minimization of crosstalk noise, delay and power using a modified bus invert technique," DATE, 2004.
  • 21
    • 0142165180 scopus 로고    scopus 로고
    • A dictionary-based en/decoding scheme for low-power data bus
    • 11, pp, Oct
    • T. LV, J. Henkel, H. Lekatsas, and W. Wolf, "A dictionary-based en/decoding scheme for low-power data bus," IEEE Trans. on VLSI, No. 5, Vol. 11, pp. 943-951, Oct. 2003.
    • (2003) IEEE Trans. on VLSI , vol.5 , pp. 943-951
    • LV, T.1    Henkel, J.2    Lekatsas, H.3    Wolf, W.4
  • 22
    • 0036625333 scopus 로고    scopus 로고
    • A bus energy model for deep submicron technology
    • P. P. Sotiriadis and A. P. Chandrakasan, "A bus energy model for deep submicron technology," IEEE Trans. on VLSI Systems, vol. 10, no. 3, pp. 341-350, 2002.
    • (2002) IEEE Trans. on VLSI Systems , vol.10 , Issue.3 , pp. 341-350
    • Sotiriadis, P.P.1    Chandrakasan, A.P.2
  • 23
    • 0036999814 scopus 로고    scopus 로고
    • Theoretical analysis of bus-invert coding
    • Rung-Bin Lin and Chi-Ming Tsai, "Theoretical analysis of bus-invert coding," IEEE Trans. on VLSI Systems, Vol. 10, No. 6, pp. 929-935, 2002.
    • (2002) IEEE Trans. on VLSI Systems , vol.10 , Issue.6 , pp. 929-935
    • Lin, R.-B.1    Tsai, C.-M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.