Minimization of crosstalk noise, delay and power using a modified bus invert technique

Proceedings - Design, Automation and Test in Europe Conference and Exhibition

Volumn 2, Issue , 2004, Pages 1372-1373

  Lampropoulos, Matheos ^a   Al Hashimi, Bashir M ^a   Rosinger, Paul ^a  

^a UNIVERSITY OF SOUTHAMPTON   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

BUS-INVERT TECHNIQUE; CROSSTALK DELAY; CROSSTALK NOISE MINIMIZATION; INDUCTIVE COUPLING; BUS ENCODING; BUS LINES; BUS-INVERT; CROSSTALK NOISE; INDUCTIVE COUPLINGS; SMALL AREA;

COMPUTER ARCHITECTURE; COMPUTER SIMULATION; INDUCTANCE; SIGNAL ENCODING; SPURIOUS SIGNAL NOISE; SWITCHING; BUSES; ELECTROMAGNETIC INDUCTION; EXHIBITIONS;

CROSSTALK;

EID: 3042517120     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2004.1269094     Document Type: Conference Paper

References (4)

1. M. Stan and W. Burleson, "Bus-invert coding for low-power I/O," IEEE Trans. on VLSI Systems, vol. 3, no. 1, pp. 49 -58, 1995.
2. K.-W. Kim and et al., "Coupling-driven signal encoding scheme for low-power interface design," in ICCAD, pp. 318-321, Nov. 2000.
3. C.-K. Cheng and et al., Interconnect Analysis and Synthesis. 2000.
4. K. Nakamura and M. Horowitz, "A 50% noise reduction interface using low-weight coding," in Symp. on VLSI Circuits, pp. 144 -145. June 1996.