On optimizing power and crosstalk for bus coupling capacitance using genetic algorithms

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 5, Issue , 2003, Pages

  Naroska, Edwin ^a   Ruan, Shanq Jang ^c   Lai, Feipei ^b   Schwiegelshohn, Uwe ^a   Liu, Le Chin ^c  

^a TU DORTMUND UNIVERSITY   (Germany)

^b NATIONAL TAIWAN UNIVERSITY   (Taiwan)

^c NONE

Author keywords

[No Author keywords available]

Indexed keywords

CACHE MEMORY; CROSSTALK; EMBEDDED SYSTEMS; GENETIC ALGORITHMS; SPURIOUS SIGNAL NOISE;

BUS COUPLING CAPACITANCES;

CAPACITANCE;

EID: 0038082045     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)

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