-
1
-
-
0034833288
-
Modeling and analysis of manufacturing variations
-
San Diego, CA
-
S. R. Nassif, "Modeling and analysis of manufacturing variations," in Proc. Custom Integr. Circuit Conf., San Diego, CA, 2001, pp. 223-228.
-
(2001)
Proc. Custom Integr. Circuit Conf
, pp. 223-228
-
-
Nassif, S.R.1
-
2
-
-
0042635808
-
Death, taxes and failing chips
-
Anaheim, CA
-
C. Visweswariah, "Death, taxes and failing chips," in Proc. Des. Autom. Conf., Anaheim, CA, 2003, pp. 343-347.
-
(2003)
Proc. Des. Autom. Conf
, pp. 343-347
-
-
Visweswariah, C.1
-
3
-
-
0041633858
-
Parameter variation and impact on circuits and microarchitecture
-
Anaheim, CA
-
S. Borkar, T. Karnik, S. Narendra, J. Tschanz, A. Keshavarzi, and V. De, "Parameter variation and impact on circuits and microarchitecture," in Proc. Design Autom. Conf., Anaheim, CA, 2003, pp. 338-342.
-
(2003)
Proc. Design Autom. Conf
, pp. 338-342
-
-
Borkar, S.1
Karnik, T.2
Narendra, S.3
Tschanz, J.4
Keshavarzi, A.5
De, V.6
-
4
-
-
29144526605
-
Modeling of failure probability and statistical design of SRAM array for yield enhancement in nanoscaled CMOS
-
Dec
-
S. Mukhopadhyay, H. Mahmoodi, and K. Roy, "Modeling of failure probability and statistical design of SRAM array for yield enhancement in nanoscaled CMOS," IEEE Trans. CAD Integr. Circuits Syst., vol. 24, no. 12, pp. 1859-1880, Dec. 2005.
-
(2005)
IEEE Trans. CAD Integr. Circuits Syst
, vol.24
, Issue.12
, pp. 1859-1880
-
-
Mukhopadhyay, S.1
Mahmoodi, H.2
Roy, K.3
-
5
-
-
0003850954
-
-
2nd ed. Upper Saddle River, NJ: Pearson Education Inc
-
J. Rabaey, A. Chandrakasan, and B. Nilolic, Digital Integrated Circuit A design perspective, 2nd ed. Upper Saddle River, NJ: Pearson Education Inc., 2003.
-
(2003)
Digital Integrated Circuit A design perspective
-
-
Rabaey, J.1
Chandrakasan, A.2
Nilolic, B.3
-
6
-
-
26444502003
-
-
C. Zhang, Y. Long, and F. Kurdahi, A scalable embedded JPEG2000 architecture, in Embedded Computer Systems: Architecture, Modeling and Simulation, Hamalainen, Ed. et al. New York: Springer, 2005, LNCS 3553, Lecture Notes in Computer Science.
-
C. Zhang, Y. Long, and F. Kurdahi, "A scalable embedded JPEG2000 architecture," in Embedded Computer Systems: Architecture, Modeling and Simulation, Hamalainen, Ed. et al. New York: Springer, 2005, vol. LNCS 3553, Lecture Notes in Computer Science.
-
-
-
-
7
-
-
21844474580
-
Novel motion-JPEG2000 video transmission system over CDMA environment
-
Oct
-
Y. Inoue, Y. Kajikawa, and Y. Nomura, "Novel motion-JPEG2000 video transmission system over CDMA environment," in Proc. IEEE Int. Symp. Commun. Inf. Technol., Oct. 2004, vol. 1, pp. 265-268.
-
(2004)
Proc. IEEE Int. Symp. Commun. Inf. Technol
, vol.1
, pp. 265-268
-
-
Inoue, Y.1
Kajikawa, Y.2
Nomura, Y.3
-
8
-
-
67349257109
-
-
ITU Recommendation T.800, ISO/IEC International Standard 15444-1, 2000.
-
ITU Recommendation T.800, ISO/IEC International Standard 15444-1, 2000.
-
-
-
-
10
-
-
13144266757
-
A process-tolerant cache architecture for improved yield in nanoscale technologies
-
Jan
-
A. Agarwal, B. C. Paul, H. Mahmoodi, A. Datta, and K. Roy, "A process-tolerant cache architecture for improved yield in nanoscale technologies," IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 13, no. 1, pp. 27-38, Jan. 2005.
-
(2005)
IEEE Trans. Very Large Scale Integr. (VLSI) Syst
, vol.13
, Issue.1
, pp. 27-38
-
-
Agarwal, A.1
Paul, B.C.2
Mahmoodi, H.3
Datta, A.4
Roy, K.5
-
11
-
-
3042622321
-
Defect and error tolerance in the presence of massive numbers of defects
-
May-Jun
-
M. A. Breuer, S. K. Gupta, and T. M. Mak, "Defect and error tolerance in the presence of massive numbers of defects," IEEE Des. Test Comput., vol. 21, no. 3, pp. 216-227, May-Jun. 2004.
-
(2004)
IEEE Des. Test Comput
, vol.21
, Issue.3
, pp. 216-227
-
-
Breuer, M.A.1
Gupta, S.K.2
Mak, T.M.3
-
12
-
-
12144290924
-
Motion JPEG2000 for high quality video systems
-
Nov
-
S. Fossel, G. Fottinger, and J. Mohr, "Motion JPEG2000 for high quality video systems," IEEE Trans. Consumer Electron., vol. 49, no. 4, pp. 787-791, Nov. 2003.
-
(2003)
IEEE Trans. Consumer Electron
, vol.49
, Issue.4
, pp. 787-791
-
-
Fossel, S.1
Fottinger, G.2
Mohr, J.3
-
13
-
-
27744554422
-
Salt-and-Pepper noise removal by median-type noise detectors and detail-preserving regularization
-
Oct
-
R. H. Chan, C. W. Ho, and M. Nikolova, "Salt-and-Pepper noise removal by median-type noise detectors and detail-preserving regularization," IEEE Trans. Image Process., vol. 14, no. 10, pp. 1479-1485, Oct. 2005.
-
(2005)
IEEE Trans. Image Process
, vol.14
, Issue.10
, pp. 1479-1485
-
-
Chan, R.H.1
Ho, C.W.2
Nikolova, M.3
-
14
-
-
34047214120
-
Deblurring of color images corrupted by impulsive noise
-
Apr
-
L. Bar, A. Brook, N. Sochen, and N. Kiryati, "Deblurring of color images corrupted by impulsive noise," IEEE Trans. Image Process., vol. 16, no. 4, pp. 1101-1111, Apr. 2007.
-
(2007)
IEEE Trans. Image Process
, vol.16
, Issue.4
, pp. 1101-1111
-
-
Bar, L.1
Brook, A.2
Sochen, N.3
Kiryati, N.4
-
15
-
-
67349217033
-
-
Barco Inc., Louvain la Neuve, Belgium, JPEG2000 Fact Sheet, [Online] . Available: http://www.barco.com/subcontracting/Downloads/IP-Products/ BA112JPEG2000EFactSheet.pdf
-
Barco Inc., Louvain la Neuve, Belgium, "JPEG2000 Fact Sheet," [Online] . Available: http://www.barco.com/subcontracting/Downloads/IP-Products/ BA112JPEG2000EFactSheet.pdf
-
-
-
-
16
-
-
67349143330
-
-
Analog Devices Inc., Norwood, MA, ADV202: JPEG 2000 Video CODEC, [Online]. Available: http://www.analog.com/en/prod/0,ADV202,00.html
-
Analog Devices Inc., Norwood, MA, "ADV202: JPEG 2000 Video CODEC," [Online]. Available: http://www.analog.com/en/prod/0,ADV202,00.html
-
-
-
-
17
-
-
67349185529
-
-
Texas Instruments, Dallas, TX, Semiconductor technology for advanced wireless handsets, [Online]. Available: http://www.cie-dfw.org/ 2006Convention/CIE-2006-microelctronic-Bill-Krenik.pdf
-
Texas Instruments, Dallas, TX, "Semiconductor technology for advanced wireless handsets," [Online]. Available: http://www.cie-dfw.org/ 2006Convention/CIE-2006-microelctronic-Bill-Krenik.pdf
-
-
-
-
18
-
-
3042624706
-
SoC yield optimization via an embedded-memory test and repair infrastructure
-
May-Jun
-
S. Shoukourian, V. Vardanian, and Y. Zorian, "SoC yield optimization via an embedded-memory test and repair infrastructure," IEEE Des. Test Comput., vol. 21, no. 3, pp. 200-207, May-Jun. 2004.
-
(2004)
IEEE Des. Test Comput
, vol.21
, Issue.3
, pp. 200-207
-
-
Shoukourian, S.1
Vardanian, V.2
Zorian, Y.3
-
19
-
-
34548133522
-
Cross layer error exploitation for aggressive voltage scaling
-
A. K. Djahromi, A. M. Eltawil, F. Kurdahi, and R. K. U. Irvine, "Cross layer error exploitation for aggressive voltage scaling," in Proc. ISQED, 2007, pp. 192-197.
-
(2007)
Proc. ISQED
, pp. 192-197
-
-
Djahromi, A.K.1
Eltawil, A.M.2
Kurdahi, F.3
Irvine, R.K.U.4
-
22
-
-
67349110994
-
-
HP Labs, Palo Alto, CA, CACTI 4 Overview, [Online]. Available: http://www.hpl.hp.com/personal/Norman-Jouppi/cacti4.html
-
HP Labs, Palo Alto, CA, "CACTI 4 Overview," [Online]. Available: http://www.hpl.hp.com/personal/Norman-Jouppi/cacti4.html
-
-
-
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