-
2
-
-
18144406931
-
Trends in testing integrated circuits
-
B. Vermeulen, C. Hora, B. Kruseman, E. J. Marinissen, and R. van Rijsinge, "Trends in testing integrated circuits," International Test Conference, 2004, pp. 688-697.
-
(2004)
International Test Conference
, pp. 688-697
-
-
Vermeulen, B.1
Hora, C.2
Kruseman, B.3
Marinissen, E.J.4
Van Rijsinge, R.5
-
4
-
-
18144383556
-
An economic analysis and ROI model for nanometer test
-
B. Keller, M. Tegethoff, T. Bartenstein, and V. Chickermane, "An economic analysis and ROI model for nanometer test," International Test Conference, 2004, pp. 518-524.
-
(2004)
International Test Conference
, pp. 518-524
-
-
Keller, B.1
Tegethoff, M.2
Bartenstein, T.3
Chickermane, V.4
-
6
-
-
0142215968
-
Convolutional compaction of test responses
-
J. Rajski, J. Tyszer, C. Wang, S. M. Reddy, "Convolutional Compaction of Test Responses", International Test Conference 2003, pp. 745-754.
-
(2003)
International Test Conference
, pp. 745-754
-
-
Rajski, J.1
Tyszer, J.2
Wang, C.3
Reddy, S.M.4
-
7
-
-
0142215972
-
X-tolerant compression and application of scan-ATPG patterns in a BIST architecture
-
P. Wohl, J.A. Waicukauski, S. Patel, M.A. Amin, "X-tolerant Compression and Application of Scan-ATPG Patterns in a BIST Architecture", International Test Conference 2003, pp. 727-736.
-
(2003)
International Test Conference
, pp. 727-736
-
-
Wohl, P.1
Waicukauski, J.A.2
Patel, S.3
Amin, M.A.4
-
8
-
-
37549010336
-
Minimizing the impact of scan compression
-
P. Wohl, J.A. Waicukauski, R. Kapur, S. Ramnath, E. Gizdarski, T.W. Williams, P. Jaini, "Minimizing the Impact of Scan Compression", VLSI Test Symposium 2007.
-
(2007)
VLSI Test Symposium
-
-
Wohl, P.1
Waicukauski, J.A.2
Kapur, R.3
Ramnath, S.4
Gizdarski, E.5
Williams, T.W.6
Jaini, P.7
-
12
-
-
84943549146
-
Analysis and design of optimal combinational compactors
-
P. Wohl, L. Huisman, "Analysis and Design of Optimal Combinational Compactors", VLSI Test Symposium 2003.
-
(2003)
VLSI Test Symposium
-
-
Wohl, P.1
Huisman, L.2
-
13
-
-
0036443042
-
X-compact an efficient response compaction technique for test cost reduction
-
S. Mitra, K.S. Kim, "X-Compact An Efficient Response Compaction Technique for Test Cost Reduction", International Test Conference 2002, pp. 311-320.
-
(2002)
International Test Conference
, pp. 311-320
-
-
Mitra, S.1
Kim, K.S.2
-
15
-
-
84943569678
-
Application of saluja- karpovsky compactors to test responses with many unknowns
-
J.H. Patel, S.S. Lumetta, S.M. Reddy, "Application of Saluja- Karpovsky Compactors to Test Responses with Many Unknowns", VLSI Test Symposium 2003, pp. 107-112.
-
(2003)
VLSI Test Symposium
, pp. 107-112
-
-
Patel, J.H.1
Lumetta, S.S.2
Reddy, S.M.3
-
17
-
-
33847150425
-
X-filter: Filtering unknowns from compacted test responses
-
M. Sharma, W.T. Cheng, "X-filter: Filtering unknowns from compacted test responses", International Test Conf. 2005.
-
(2005)
International Test Conf.
-
-
Sharma, M.1
Cheng, W.T.2
-
18
-
-
84886523536
-
Synthesis of X-tolerant convolutional compactors
-
J. Rajski, J. Tyszer, "Synthesis of X-Tolerant Convolutional Compactors", VLSI Test Symposium 2005.
-
(2005)
VLSI Test Symposium
-
-
Rajski, J.1
Tyszer, J.2
|