An economic analysis and ROI model for nanometer test

Proceedings - International Test Conference

Volumn , Issue , 2004, Pages 518-524

  Keller, Brion ^a   Tegethoff, Mick ^a   Bartenstein, Thomas ^a   Chickermane, Vivek ^a  

^a CADENCE DESIGN SYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DELAY DEFECTS; MOORE'S LAW; NANOMETER TEST METHODOLOGY (NTM); RETURN-ON-INVESTMENT (ROI);

AUTOMATIC TESTING; FAILURE ANALYSIS; INTEGRATED CIRCUIT TESTING; LEAKAGE CURRENTS; MICROPROCESSOR CHIPS;

LOGIC DEVICES;

EID: 18144383556     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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