Modeling and measurement of interlevel electromagnetic coupling and fringing effect in a hierarchical power distribution network using segmentation method with resonant cavity model

IEEE Transactions on Advanced Packaging

Volumn 31, Issue 3, 2008, Pages 544-557

  Kim, Jaemin ^a   Jeong, Youchu ^a   Kim, Jingook ^a   Lee, Junho ^a   Ryu, Chunghyun ^a   Shim, Jongjoo ^a   Shin, Minchul ^a   Kim, Joungho ^a  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

Fringing effect; Hierarchical power distribution network (PDN); Interlevel electromagnetic coupling; Interlevel PDN; PDN impedance; Resonant cavity model; Segmentation method; Simultaneous switching noise (SSN)

Indexed keywords

FRINGING EFFECT; HIERARCHICAL POWER DISTRIBUTION NETWORK (PDN); INTERLEVEL ELECTROMAGNETIC COUPLING; INTERLEVEL PDN; PDN IMPEDANCE; RESONANT CAVITY MODEL; SEGMENTATION METHOD; SIMULTANEOUS SWITCHING NOISE (SSN);

CAVITY RESONATORS; DISTRIBUTED PARAMETER NETWORKS; DISTRIBUTION OF GOODS; ELECTRIC POWER DISTRIBUTION; ELECTROMAGNETIC COUPLING; ELECTROMAGNETISM; JITTER; MICROPROCESSOR CHIPS; PLATE METAL; PLATES (STRUCTURAL COMPONENTS); PLATING; PRINTED CIRCUIT BOARDS; PRINTED CIRCUIT MANUFACTURE; RESONANCE; SANITARY SEWERS; SWITCHING;

ELECTRIC NETWORK ANALYSIS;

EID: 65349159978     PISSN: 15213323     EISSN: None     Source Type: Journal    
DOI: 10.1109/TADVP.2008.927837     Document Type: Article

References (21)

1. International technology roadmap for semiconductors Semiconductor Industry Assoc., 2006.
2. T. Sudo, H. Sasaki, N. Masuda, and J. L. Drewniak, "Electromagnetic interference (EMI) of system-on-package (SOP)," IEEE Trans. Adv. Packag., vol. 27, no. 2, pp. 304-314, May 2004.
3. H. Kim, Y. Jeong, J. Park, S. Lee, J. Hong, Y. Hong, and J. Kim, "Significant reduction of power/ground inductive impedance and simultaneous switching noise by using embedded film capacitor," Electron. Perform. Electron. Packag., pp. 129-132, Oct. 2003.
4. J. Kim, "Analysis of noise coupling from a power distribution network to signal traces in high-speed multilayer printed circuit boards," IEEE Trans. Electromagn. Compat., vol. 48, no. 2, pp. 319-330, May 2006.
5. J. Park, H. Kim, Y. Jeong, J. Kim, J. S. Pak, D. G. Kam, and J. Kim, "Modeling and measurement of simultaneous switching noise coupling through signal via transition," IEEE Trans. Adv. Packag., vol. 29, no. 3, pp. 548-559, Aug. 2006.
6. J. S. Pak, H. Kim, H. Lee, and J. Kim, "PCB power/ground plane edge radiation excited by high-frequency clock," in Proc. 2004 IEEE Int. Symp. Electromagn. Compatibil., 2004, vol. 1, pp. 197-202.
7. M. Xu and T. H. Hubing, "Estimating the power bus impedance of printed circuit boards with embedded capacitance," IEEE Trans. Adv. Packag. vol. 25, no. 3, pp. 424-432, Aug. 2002.
8. G.-T. Lei, R. W. Techentin, and B. K. Gilbert, "High frequency characterization of power/ground-plane structures," IEEE Trans. Microw. Theory Tech., vol. 47, no. 5, pp. 562-569, May 1999.
9. Z. L. Wang, O. Wada, Y. Toyota, and R. Koga, "Convergence acceleration and accuracy improvement in power bus impedance calculation with a fast algorithm using cavity modes," IEEE Trans. Electromagn. Compat., vol. 47, no. 1, pp. 2-9, Feb. 2005.
10. T. Okoshi, Y. Uehara, and T. Takeuchi, "The segmentation method: An approach to the analysis of microwave planar circuits," IEEE Trans. Microw. Theory Tech., vol. MTT-24, no. 10, pp. 662-668, Oct. 1976.
11. R. Chadha and K. C. Gupta, "Segmentation method using impedance matrices for analysis of planar microwave circuits," IEEE Trans. Microw. Theory Tech., vol. MTT-29, no. 1, pp. 71-74, Jan. 1981.
12. R. Sorrentino, "Planar circuits, waveguide models and segmentation method," IEEE Trans. Microw. Theory Tech., vol. MTT-33, no. 10, pp. 1057-1066, Oct. 1985.
13. T. Okoshi, Planar Circuits For Microwaves and Lightwaves. Munich, Germany: Springer-Verlag, 1985, ch. 2.
14. L. Zhang, B. Archambeault, S. Conner, J. L. Knighten, J. Fan, N. W. Smith, R. Alexander, R. E. DuBroff, and J. L. Drewniak, "A circuit approach to model narrowslot structures in a power bus," in Proc. IEEE Int. Symp. Electromagn. Compatibil., 2004, vol. 2, pp. 401-406.
15. Y. Jeong, J. Kim, and J. Kim, "Matrix substitution method for power bus analysis with isolated power island in high-speed packages and pcbs," IEEE Microw.Wireless Compon. Lett., vol. 16, no. 1, pp. 31-33, Jan. 2006.
16. Z. L. Wang, O. Wada, Y. Toyota, and R. Koga, "Modeling of gapped power bus structures for isolation using cavity modes and segmentation," IEEE Trans. Electromagn. Compat., vol. 47, no. 2, pp. 210-218, May 2005.
17. Y. Jeong, "Hybrid analytical modeling method for split power bus in multi-layered package," IEEE Trans. Electromagn. Compat., vol. 48, no. 1, pp. 82-94, Feb. 2006.
18. G. Selli, J. L. Drewniak, R. E. Dubroff, J. Fan, J. L. Knighten, N. W. Smith, D. McCoy, and B. Archambeault, "Power integrity investigation of BGA footprints by means of the segmentation method," in Proc. Int. Symp. Electromagn. Compatibil., 2005, vol. 2, pp. 655-659.
19. D. M. Pozar, Microwave Engineering, 2nd ed. New York: Wiley, 1998, pp. 161-162.
20. H. W. Johnson and M. Graham, High-Speed Digital Design - A Hand Book of Back Magic. Englewood Cliffs, NJ: Prentice Hall, 1993, p. 257.
21. H. W. Johnson and M. Graham, High-Speed Signal Propagation-Advanced Black Magic. Englewood Cliffs, NJ: Prentice Hall, 2003, p. 354.