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Volumn 25, Issue 3, 2002, Pages 424-432

Estimating the power bus impedance of printed circuit boards with embedded capacitance

Author keywords

Cavity theory; Conduction loss; Dielectric loss; Embedded capacitance (buried capacitance); Power bus decoupling; Power bus impedance; Power bus modeling; Power bus noise (delta I noise, ground bounce noise, simultaneous switching noise); Power bus resonance

Indexed keywords

CAPACITANCE; COMPUTATIONAL METHODS; DIELECTRIC LOSSES; ELECTRIC IMPEDANCE; POWER ELECTRONICS;

EID: 0036706222     PISSN: 15213323     EISSN: None     Source Type: Journal    
DOI: 10.1109/TADVP.2002.806733     Document Type: Conference Paper
Times cited : (43)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.