Novel asymmetric MOSFET structures for low power applications

2008 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC

Volumn , Issue , 2008, Pages

  Venkatagirish, N ^a   Jhaveri, Ritesh ^a   Tura, Ahmet ^a   Woo, Jason ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATIONS; FIELD EFFECT TRANSISTORS; MOSFET DEVICES; THRESHOLD VOLTAGE;

ANALOG APPLICATIONS; CARRIER INJECTIONS; CMOS PROCESS; GATE LEAKAGES; LOW POWER APPLICATIONS; LOW-POWER; MOSFET STRUCTURES; MOSFETS; NEW DEVICES; NOVEL DEVICES; PARASITIC CAPACITANCES; POWER DISSIPATIONS; SCALING LIMITATIONS; SHORT-CHANNEL EFFECTS; SOURCE JUNCTIONS; SUB-50 NM; SUB-THRESHOLD BEHAVIORS; SUB-THRESHOLD SWINGS;

SOLID STATE DEVICES;

EID: 63249095862     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EDSSC.2008.4760736     Document Type: Conference Paper

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