Assembly technology for three dimensional integrated circuits

2005 Proceedings - 22nd International VLSI Multilevel Interconnection Conference, VMIC 2005

Volumn , Issue , 2005, Pages 83-88

  Topol, A W ^a   La Tulipe, D C ^a   Shi, L ^a   Alam, S M ^a   Young, A M ^a   Frank, D J ^a   Steen, S E ^a   Vichiconti, J ^a   Posillico, D ^a   Canapeti, D M ^a   Medd, S ^a   Conti, R A ^a   Goma, S ^a   Dimilia, D ^a   Wang, C ^a   Deligianni, L ^a   Cobb, M A ^a   Jenkins, K ^a   Kumar, A ^a   Kwietniak, K T ^a   Robson, M ^a   Gibson, G W ^a   D'Emic, C ^a   Nowak, E ^a   Joshi, R ^a   Guarini, K W ^a   Ieong, M ^a   more..

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ACTIVE DEVICE LAYERS; ASSEMBLY TECHNOLOGY; HIGH PRECISION ALIGNMENTS; MANUFACTURING SOLUTIONS; PROCESSING TECHNOLOGIES; THREE DIMENSIONAL INTEGRATED CIRCUITS; VERTICAL INTERCONNECTIONS; WAFER-SCALE INTEGRATION;

ALIGNMENT; BONDING; ELECTRIC POWER SYSTEM INTERCONNECTION; INFORMATION TECHNOLOGY; INTEGRATED CIRCUITS; OPTIMIZATION; THREE DIMENSIONAL; WSI CIRCUITS;

WAFER BONDING;

EID: 61649116812     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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