Flip chip interconnects qualified for advanced low-k chips with SnCu bumps by alloying Cu/Sn plated stack

Proceedings - 2008 2nd Electronics Systemintegration Technology Conference, ESTC

Volumn , Issue , 2008, Pages 719-723

  Ezawa, Hirokazu ^a   Uchida, Masayuki ^a   Miura, Masayuki ^a   Togasaki, Takashi ^a   Iijima, Tsunetoshi ^a   Migita, Tatsuo ^a   Iijima, Tadashi ^a   Higuhci, Kazuhito ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP PACKAGES; CREEP BEHAVIORS; CREEP RATES; FEATURE SIZES; FLIP CHIPS; GRAIN STRUCTURES; INTER-CONNECTS; SNCU SOLDERS;

ALLOYING; CREEP; METALLIC COMPOUNDS; PHOTORESISTS;

CERIUM ALLOYS;

EID: 58149093922     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESTC.2008.4684439     Document Type: Conference Paper

References (8)

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