-
1
-
-
0030387666
-
A highly stable SRAM memory cell with top-gated p-n drain poly-Si TFTs for 1.5 V operation
-
F. Hayashi, H. Ohkubo, T. Takahashi, S. Horiba, K. Noda, T. Uchida, T. Shimizu, N. Sugawara, and S. Kumashiro, "A highly stable SRAM memory cell with top-gated p-n drain poly-Si TFTs for 1.5 V operation," in IEDM Tech. Dig., 1996, pp. 283-286.
-
(1996)
IEDM Tech. Dig
, pp. 283-286
-
-
Hayashi, F.1
Ohkubo, H.2
Takahashi, T.3
Horiba, S.4
Noda, K.5
Uchida, T.6
Shimizu, T.7
Sugawara, N.8
Kumashiro, S.9
-
2
-
-
0031644053
-
A novel pillar DRAM cell for 4 Gbit and beyond
-
H. J. Cho, F. Nemati, P. B. Griffin, and J. D. Plummer, "A novel pillar DRAM cell for 4 Gbit and beyond," in VLSI Symp. Tech. Dig., 1998, pp. 38-39.
-
(1998)
VLSI Symp. Tech. Dig
, pp. 38-39
-
-
Cho, H.J.1
Nemati, F.2
Griffin, P.B.3
Plummer, J.D.4
-
3
-
-
0012258197
-
Current and future technology of low-temperature poly-Si TFT-LCDs
-
Y. Oana, "Current and future technology of low-temperature poly-Si TFT-LCDs," J. Soc. Inf. Disp., vol. 9, no. 3, pp. 201-248, 2001.
-
(2001)
J. Soc. Inf. Disp
, vol.9
, Issue.3
, pp. 201-248
-
-
Oana, Y.1
-
4
-
-
20544455646
-
A novel process-compatible fluorination technique with electrical characteristic improvements of poly-Si TFTs
-
Jun
-
S.-D. Wang, W.-H. Lo, T.-Y. Chang, and T.-E Lei, "A novel process-compatible fluorination technique with electrical characteristic improvements of poly-Si TFTs," IEEE Electron Device Lett., vol. 26, no. 6, pp. 372-374, Jun. 2005.
-
(2005)
IEEE Electron Device Lett
, vol.26
, Issue.6
, pp. 372-374
-
-
Wang, S.-D.1
Lo, W.-H.2
Chang, T.-Y.3
Lei, T.-E.4
-
5
-
-
0024612018
-
High performance low-temperature poly-Si n-channel TFTs for LCD
-
Feb
-
A. Mimura, N. Konishi, K. Ono, J.-I. Ohwada, Y. Hosokawa, Y. A. Ono, Y. Suzuki, K. Miyata, and H. Kawakami, "High performance low-temperature poly-Si n-channel TFTs for LCD," IEEE Trans. Electron Devices, vol. 36, no. 2, pp. 351-359, Feb. 1989.
-
(1989)
IEEE Trans. Electron Devices
, vol.36
, Issue.2
, pp. 351-359
-
-
Mimura, A.1
Konishi, N.2
Ono, K.3
Ohwada, J.-I.4
Hosokawa, Y.5
Ono, Y.A.6
Suzuki, Y.7
Miyata, K.8
Kawakami, H.9
-
6
-
-
0032648371
-
A comparison of hydrogen and deuterium plasma treatment effects on polysilicon TFT performance and DC reliability
-
Aug
-
Y.-J. Tung, J. Boyce, J. Ho, X. Huang, and T.-J. King, "A comparison of hydrogen and deuterium plasma treatment effects on polysilicon TFT performance and DC reliability," IEEE Electron Device Lett., vol. 20, no. 8, pp. 387-389, Aug. 1999.
-
(1999)
IEEE Electron Device Lett
, vol.20
, Issue.8
, pp. 387-389
-
-
Tung, Y.-J.1
Boyce, J.2
Ho, J.3
Huang, X.4
King, T.-J.5
-
7
-
-
0026140319
-
Passivation kinetics of two types of defects in polysilicon TFT by plasma hydrogenation
-
Apr
-
I-W. Wu, T-Y. Huang, W. B. Jackson, A. G. Lewis, and A. C. Chiang, "Passivation kinetics of two types of defects in polysilicon TFT by plasma hydrogenation," IEEE Electron Device Lett., vol. 12, no. 4, pp. 181-183, Apr. 1991.
-
(1991)
IEEE Electron Device Lett
, vol.12
, Issue.4
, pp. 181-183
-
-
Wu, I.-W.1
Huang, T.-Y.2
Jackson, W.B.3
Lewis, A.G.4
Chiang, A.C.5
-
8
-
-
33947281578
-
Negative bias temperature instability in low-temperature polycrystalline silicon thin-film transistors
-
Dec
-
C.-Y. Chen, J.-W. Lee, S.-D. Wang, M.-S. Shieh, P.-H. Lee, W.-C. Cheng, H.-Y. Lin, K.-L. Yeh, and T.-F. Lei, "Negative bias temperature instability in low-temperature polycrystalline silicon thin-film transistors," IEEE Trans. Electron Devices, vol. 53, no. 12, pp. 2993-3000, Dec. 2006.
-
(2006)
IEEE Trans. Electron Devices
, vol.53
, Issue.12
, pp. 2993-3000
-
-
Chen, C.-Y.1
Lee, J.-W.2
Wang, S.-D.3
Shieh, M.-S.4
Lee, P.-H.5
Cheng, W.-C.6
Lin, H.-Y.7
Yeh, K.-L.8
Lei, T.-F.9
-
9
-
-
0030735702
-
Effects of NH3 plasma passivation on n-channel polycrystalline silicon thin-film transistors
-
Jan
-
H.-C. Cheng, F.-S. Wang, and C.-Y. Huang, "Effects of NH3 plasma passivation on n-channel polycrystalline silicon thin-film transistors," IEEE Trans. Electron Devices, vol. 44, no. 1, pp. 64-68, Jan. 1997.
-
(1997)
IEEE Trans. Electron Devices
, vol.44
, Issue.1
, pp. 64-68
-
-
Cheng, H.-C.1
Wang, F.-S.2
Huang, C.-Y.3
-
10
-
-
0023961765
-
Hot-electron degradation of n-channel polysilicon MOSFETs
-
Feb
-
S. Banerjee, R. Sundaresan, H. Shichijo, and S. Malhi, "Hot-electron degradation of n-channel polysilicon MOSFETs," IEEE Trans. Electron Devices, vol. 35, no. 2, pp. 152-157, Feb. 1988.
-
(1988)
IEEE Trans. Electron Devices
, vol.35
, Issue.2
, pp. 152-157
-
-
Banerjee, S.1
Sundaresan, R.2
Shichijo, H.3
Malhi, S.4
-
11
-
-
0027591006
-
Physical models for degradation effects in polysilicon thin-film transistors
-
May
-
M. Hack, A. G. Lewis, and I.-W. Wu, "Physical models for degradation effects in polysilicon thin-film transistors," IEEE Trans. Electron Devices, vol. 40, no. 5, pp. 890-897, May 1993.
-
(1993)
IEEE Trans. Electron Devices
, vol.40
, Issue.5
, pp. 890-897
-
-
Hack, M.1
Lewis, A.G.2
Wu, I.-W.3
-
12
-
-
34948863321
-
High-performance and low-temperature-compatible p-channel polycrystalline-silicon TFTs using hafnium-silicate gate dielectric
-
Oct
-
M.-J. Yang, C.-H. Chien, Y-H. Lu, G.-L. Luo, S.-C. Chiu, C.-C. Lou, and T.-Y. Huang, "High-performance and low-temperature-compatible p-channel polycrystalline-silicon TFTs using hafnium-silicate gate dielectric," IEEE Electron Device Lett., vol. 28, no. 10, pp. 902-904, Oct. 2007.
-
(2007)
IEEE Electron Device Lett
, vol.28
, Issue.10
, pp. 902-904
-
-
Yang, M.-J.1
Chien, C.-H.2
Lu, Y.-H.3
Luo, G.-L.4
Chiu, S.-C.5
Lou, C.-C.6
Huang, T.-Y.7
-
13
-
-
33646263586
-
2 gate dielectric
-
May
-
2 gate dielectric," IEEE Electron Device Lett., vol. 27, no. 5, pp. 360-363, May 2006.
-
(2006)
IEEE Electron Device Lett
, vol.27
, Issue.5
, pp. 360-363
-
-
Lin, C.-P.1
Tsui, B.-Y.2
Yang, M.-J.3
Huang, R.-H.4
Chien, C.H.5
-
14
-
-
37549052104
-
3 gate dielectric
-
Jan
-
3 gate dielectric," IEEE Electron Device Lett., vol. 29, no. 1, pp. 96-98, Jan. 2008.
-
(2008)
IEEE Electron Device Lett
, vol.29
, Issue.1
, pp. 96-98
-
-
Chang, C.-W.1
Deng, C.-K.2
Huang, J.-J.3
Chang, H.-R.4
Lei, T.-F.5
-
15
-
-
0032292720
-
3 gate insulators
-
Dec
-
3 gate insulators," IEEE Electron Device Lett., vol. 19, no. 12, pp. 502-504, Dec. 1998.
-
(1998)
IEEE Electron Device Lett
, vol.19
, Issue.12
, pp. 502-504
-
-
Jin, Z.1
Kwok, H.S.2
Wong, M.3
-
16
-
-
0027805783
-
2-plasma treatment on the characteristics of polysilicon thin-film transistors
-
Dec
-
2-plasma treatment on the characteristics of polysilicon thin-film transistors," IEEE Trans. Electron Devices, vol. 40, no. 12, pp. 2301-2306, Dec. 1993.
-
(1993)
IEEE Trans. Electron Devices
, vol.40
, Issue.12
, pp. 2301-2306
-
-
Chern, H.N.1
Lee, C.L.2
Lei, T.F.3
-
17
-
-
0027553864
-
2 plasma on polysilicon thin-film transistor
-
Mar
-
2 plasma on polysilicon thin-film transistor," IEEE Electron Device Lett., vol. 14, no. 3, pp. 115-117, Mar. 1993.
-
(1993)
IEEE Electron Device Lett
, vol.14
, Issue.3
, pp. 115-117
-
-
Chern, H.N.1
Lee, C.L.2
Lei, T.F.3
-
18
-
-
0028749058
-
ECR plasma oxidation effects on performance and stability of polysilicon thin film transistors
-
J.-Y. Lee, C.-H. Han, and C.-K. Kim, "ECR plasma oxidation effects on performance and stability of polysilicon thin film transistors," in IEDM Tech. Dig., 1994, pp. 523-526.
-
(1994)
IEDM Tech. Dig
, pp. 523-526
-
-
Lee, J.-Y.1
Han, C.-H.2
Kim, C.-K.3
-
19
-
-
0028485023
-
High performance low temperature polysilicon thin film transistor using ECR plasma thermal oxide as gate insulator
-
Aug
-
J.-Y. Lee, C.-H. Han, and C.-K. Kim, "High performance low temperature polysilicon thin film transistor using ECR plasma thermal oxide as gate insulator," IEEE Electron Device Lett., vol. 15, no. 8, pp. 301-303, Aug. 1994.
-
(1994)
IEEE Electron Device Lett
, vol.15
, Issue.8
, pp. 301-303
-
-
Lee, J.-Y.1
Han, C.-H.2
Kim, C.-K.3
-
20
-
-
0030126862
-
Stability of n-channel polysilicon thin-film transistors with ECR plasma thermal gate oxide
-
Apr
-
J.-Y. Lee, C.-H. Han, and C.-K. Kim, "Stability of n-channel polysilicon thin-film transistors with ECR plasma thermal gate oxide," IEEE Electron Device Lett., vol. 17, no. 4, pp. 169-171, Apr. 1996.
-
(1996)
IEEE Electron Device Lett
, vol.17
, Issue.4
, pp. 169-171
-
-
Lee, J.-Y.1
Han, C.-H.2
Kim, C.-K.3
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