Negative bias temperature instability in low-temperature polycrystalline silicon thin-film transistors

IEEE Transactions on Electron Devices

Volumn 53, Issue 12, 2006, Pages 2993-2999

  Chen, Chih Yang ^a,b,d   Lee, Jam Wem ^c   Wang, Shen De ^b   Shieh, Ming Shan ^b   Lee, Po Hao ^b   Chen, Wei G ^d   Lin, Hsiao Yi ^a,d   Yeh, Kuan Lin ^d   Lei, Tan Fu ^a,b  

^a IEEE   (Taiwan)

^b NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^c NATIONAL NANO DEVICE LABORATORIES   (Taiwan)

^d InnoLux Display Corporation   (Taiwan)

Author keywords

Grain boundary trap state; Low temperature polycrystalline silicon thin film transistors (LTPS TFTs); Negative bias temperature instability (NBTI); Reliability

Indexed keywords

GRAIN BOUNDARY TRAP STATES; LOW TEMPERATURE POLYCRYSTALLINE SILICON THIN FILM TRANSISTORS (LTPS TFTS); NEGATIVE BIAS TEMPERATURE INSTABILITY (NBTI);

GRAIN BOUNDARIES; MOSFET DEVICES; POLYCRYSTALLINE MATERIALS; RELIABILITY; SILICON; THERMODYNAMIC STABILITY;

THIN FILM TRANSISTORS;

EID: 33947281578     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2006.885543     Document Type: Article

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