A 14 mW fractional-N PLL modulator with a digital phase detector and frequency switching scheme

IEEE Journal of Solid-State Circuits

Volumn 43, Issue 11, 2008, Pages 2464-2471

  Ferriss, Mark A ^a   Flynn, Michael P ^a  

^a UNIVERSITY OF MICHIGAN   (United States)

Author keywords

ADC; DAC; Delta sigma; Fractional N; Fractional PLL (FPLL); FSK; Phase minimization loop; Phase locked loop (PLL); PML; Synthesizer

Indexed keywords

ADC; DAC; DELTA-SIGMA; FRACTIONAL-N; FRACTIONAL-PLL (FPLL); FSK; PHASE MINIMIZATION LOOP; PHASE-LOCKED LOOP (PLL); PML; SYNTHESIZER;

DETECTORS; DIGITAL ARITHMETIC; FREQUENCY SHIFT KEYING; MODULATION; MODULATORS; PHASE LOCKED LOOPS; SIGNAL DETECTION; TELECOMMUNICATION SYSTEMS; TRANSCEIVERS;

ANTENNA PHASED ARRAYS;

EID: 56849112279     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2008.2005435     Document Type: Article

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