LMS-Based Calibration of an RF Digitally Controlled Oscillator for Mobile Phones

IEEE Transactions on Circuits and Systems II: Express Briefs

Volumn 53, Issue 3, 2006, Pages 225-229

  Staszewski, Robert Bogdan ^a   Wallberg, John ^a   Hung, Chih Ming ^a   Feygin, Gennady ^a   Entezari, Mitch ^a   Leipold, Dirk ^a  

^a TEXAS INSTRUMENTS   (United States)

Author keywords

All digital; calibration; deep submicrometer CMOS; digital compensation; digitally controlled oscillator (DCO); frequency synthesizer; Global System for Mobile Communications (GSM); mobile phones; modulator

Indexed keywords

BANDWIDTH; CALIBRATION; FREQUENCY MODULATION; GLOBAL SYSTEM FOR MOBILE COMMUNICATIONS; MODULATORS; PHASE LOCKED LOOPS; TRANSCEIVERS;

ALL-DIGITAL PHASE-LOCKED LOOP (ADPLL); DEEP-SUBMICROMETER; DIGITAL COMPENSATION; DIGITALLY CONTROLLED OSCILLATOR (DCO); GAIN CALIBRATION; LEAST-MEAN SQUARE (LMS); MOBILE PHONES;

OSCILLATORS (ELECTRONIC);

EID: 33644991472     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2005.858750     Document Type: Article

References (11)

1. T. A. Riley and M. A. Copeland, “A simplified continuous time modulation technique,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 41, no. 5, pp. 321–328, May 1994.
2. M. H. Perrott, T. L. Tewksbury, and C. G. Sodini et al., “A 27-mW CMOS fractional-N synthesizer using digital compensation for 2.5-Mb/s GFSK modulation,” IEEE J. Solid-State Circuits, vol. 32, no. 12, pp. 2048–2060, Dec. 1997.
3. D. R. McMahill and C. G. Sodini, “A 2.5-Mb/s GFSK 5.0-Mb/s 4-FSK automatically calibrated ∑-Δ frequency synthesizer,” IEEE J. Solid-State Circuits, vol. 37, no. 1, pp. 18–26, Jan. 2002.
4. S. T. Lee, S. J. Fang, and D. J. Allstot et al., “A quad-band GSM-GPRS transmitter with digital auto-calibration,” IEEE J. Solid-State Circuits, vol. 39, no. 12, pp. 2200–2214, Dec. 2004.
5. M. Bopp, M. Alles, and M. Arens et al., “A DECT transceiver chip set using SiGe technology,” in Proc. IEEE Solid-State Circuits Conf., Feb. 1999, pp. 68–69.
6. R. B. Staszewski, D. Leipold, and P. T. Balsara, “Just-in-time gain estimation of an RF digitally controlled oscillator for digital direct frequency modulation,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 50, no. 11, pp. 887–892, Nov. 2003.
7. R. B. Staszewski, D. Leipold, J. Wallberg, and P. T. Balsara, “Just-in-time gain estimation of an RF digitally controlled oscillator,” in Proc. 2003 IEEE Custom Integrated Circuits Conf., Sep. 2003, pp. 571–574.
8. R. B. Staszewski, J. Wallberg, and S. Rezeq et al., “All-digital PLL and GSM/EDGE transmitter in 90-nm CMOS,” in Proc. IEEE Solid-State Circuits Conf., Feb. 2005, pp. 316–317.
9. R. B. Staszewski, C.-M. Hung, N. Barton, M.-C. Lee, and D. Leipold, “A first RF digitally controlled oscillator for mobile phones,” in Proc. 2005 IEEE Radio Frequency Integrated Circuits (RFIC) Symp., Jun. 2005, pp. 119–122.
10. R. B. Staszewski and P. T. Balsara, “Phase-domain all-digital phase-locked loop,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 52, no. 3, pp. 159–163, Mar. 2005.
11. R. B. Staszewski, K. Muhammad, and D. Leipold et al., “All-digital TX frequency synthesizer and discrete-time receiver for Bluetooth radio in 130-nm CMOS,” IEEE J. Solid-State Circuits, vol. 39, no. 12, pp. 2278–2291, Dec. 2004.