Fabrication and characterization of metal-ferroelectric-insulator-Si diodes and transistors with different HfSiON buffer layer thickness

Journal of Materials Research

Volumn 23, Issue 10, 2008, Pages 2727-2732

  Lu, Xubing ^a   Ishiwara, Hiroshi ^a   Maruyama, Kenji ^b  

^a TOKYO INSTITUTE OF TECHNOLOGY   (Japan)

^b FUJITSU LABORATORIES LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER LAYERS; CHARGE INJECTION; DATA STORAGE EQUIPMENT; DIODES; DRAIN CURRENT; ELECTRIC PROPERTIES; ELECTRON BEAMS; EPITAXIAL LAYERS; FABRICATION; FERROELECTRICITY; INJECTION (OIL WELLS); LEAKAGE CURRENTS; OPTICAL WAVEGUIDES; SEMICONDUCTING SILICON COMPOUNDS; SEMICONDUCTOR DEVICE STRUCTURES; SILICON; SILICON COMPOUNDS; TRANSISTORS; WINDOWS;

ATOMIC INTERDIFFUSION; BUFFER LAYER THICKNESSES; CURRENT ON/OFF RATIOS; DATA RETENTIONS; ELECTRICAL PROPERTIES; ELECTRON BEAM EVAPORATIONS; EQUIVALENT OXIDE THICKNESSES; FLATBAND VOLTAGES; GATE STRUCTURES; GATE TRANSISTORS; GATE VOLTAGES; HFSION FILMS; MEMORY WINDOWS; RANGING; SWEEPING VOLTAGES;

HAFNIUM COMPOUNDS;

EID: 54449094652     PISSN: 08842914     EISSN: None     Source Type: Journal    
DOI: 10.1557/jmr.2008.0336     Document Type: Article

References (15)

1. H. Ishiwara: Recent progress in ferroelectric-gate FETs, in Ferroelectric Thin Films XI, edited by D.Y. Kaufman, S. Hoffmann-Eifert, S.R. Gilbert, A. Aggarwal, and M. Shimizu (Mater. Res. Soc. Symp. Proc. 748, Warrendale, PA, 2003), U9.5.
2. 9/SiN/Si structures. IEEE Electron Device Lett. 23, 82 (2002).
3. 9/SiN/Si structures. Appl. Phys. Lett. 85, 1439 (2004).
4. 2/Si ferroelectric gate oxide structure. Thin Solid Films 388, 266 (2001).
5. 3/Si structures. Appl. Phys. Lett. 79, 806 (2001).
6. 3 thin film as an insulator. Appl. Phys. A 81, 1273 (2005).
7. M. Takahashi and S. Sakai: Self-aligned-gate metal/ferroelectric/ insulator/semiconductor field-effect transistors with long memory retention. J. Jpn. Appl. Phys. 44, L800 (2005).
8. S. Sakai and R. Ilangovan: Metal-ferroelectric-insulator-semiconductor memory FET with long retention and high endurance. IEEE Electron Device Lett. 25, 369 (2004).
9. 2 buffer layers. J. Jpn. Appl. Phys 44, 6218 (2005).
10. 2/Si structures. Appl. Phys. Lett. 85, 4448 (2004).
11. X.B. Lu, K. Maruyama, and H. Ishiwara: Metal-ferroelectric-insulator-Si devices using HfTaO buffer layers. Semicond. Sci. Technol. 23, 045002 (2008).
12. X.B. Lu, K. Maruyama, and H. Ishiwara: Characterization of HfTaO films for gate oxide and metal-ferroelectric-insulator-silicon device applications. J. Appl. Phys. 103, 044105 (2008).
13. E.P. Gusev, V. Narayanan, and M.M. Frank: Advanced high-kappa dielectric stacks with polySi and metal gates: Recent progress and current challenges. IBM J. Res. & Dev. 50, 387 (2006).
14. H. Hoko, C. Aoki, Y. Tabuchi, T. Tamura, K. Maruyama, Y. Arimoto, and H. Ishiwara: Electrical properties of Pt/BLT/HfSiON/Si structure for 1T-type ferroelectric memory. Integr. Ferroelectr. 79, 205 (2006).
15. X. Wang, J. Liu, F. Zhu, N. Yamada, and D-L. Kwong: A simple approach to fabrication of high-quality HfSiON gate dielectrics with improved nMOSFET performances. IEEE Trans. Electron. Devices 51, 1798 (2004).