Soft error hardened latch and its estimation method

Japanese Journal of Applied Physics

Volumn 47, Issue 4 PART 2, 2008, Pages 2736-2741

  Uemura, Taiki ^a   Tanabe, Ryo ^a   Tosaka, Yoshiharu ^a   Satoh, Shigeo ^a  

^a FUJITSU LABORATORIES LTD   (Japan)

Author keywords

Alpha; Flip flop; Latch; Neutron; Radiation; Soft error

Indexed keywords

CIRCUIT SIMULATION; FLIP FLOP CIRCUITS; MICROPROCESSOR CHIPS; NETWORKS (CIRCUITS);

ALPHA; DATA NODES; DEVICE SIMULATIONS; ESTIMATION METHODS; FEEDBACK LOOPS; FLIP-FLOP; KEY TECHNOLOGIES; LATCH; PRECISE SIMULATIONS; RETENTION DATUM; SIMPLE CIRCUITS; SOFT ERROR; SOFT ERRORS; STORAGE NODES; TRANSIENT NOISES;

ERROR CORRECTION;

EID: 54249162397     PISSN: 00214922     EISSN: 13474065     Source Type: Journal    
DOI: 10.1143/JJAP.47.2736     Document Type: Article

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