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Volumn 13, Issue 4, 2008, Pages

Constraint-driven floorplan repair

Author keywords

Constraints; Floorplanning; Legalization

Indexed keywords

ALGORITHMIC FRAMEWORK; CONSTRAINTS; DESIGN CONSTRAINTS; FIXED-OUTLINE; FLOORPLANNING; GRADUAL MODIFICATIONS; GRAPH-BASED; INITIAL DESIGN; LEGALIZATION; PLACEMENT ALGORITHMS;

EID: 53849137014     PISSN: 10844309     EISSN: 15577309     Source Type: Journal    
DOI: 10.1145/1391962.1391975     Document Type: Article
Times cited : (8)

References (15)
  • 1
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    • Fixed-outline floorplanning: Enabling hierarchical Design
    • ADYA, S. N. AND MARKOV, I. L. 2003. Fixed-outline floorplanning: Enabling hierarchical Design. In IEEE Trans. VLSI Syst. 11, 6, 1120-1135.
    • (2003) IEEE Trans. VLSI Syst , vol.11 , Issue.6 , pp. 1120-1135
    • ADYA, S.N.1    MARKOV, I.L.2
  • 3
    • 84954416950 scopus 로고    scopus 로고
    • Multi-level placement for large-scale mixed-size IC designs
    • CHANG, C., CONG, J., AND YUAN, X. 2003. Multi-level placement for large-scale mixed-size IC designs. In Proceedings of ASP-DAC, 325-330.
    • (2003) Proceedings of ASP-DAC , pp. 325-330
    • CHANG, C.1    CONG, J.2    YUAN, X.3
  • 4
    • 84861421567 scopus 로고    scopus 로고
    • Fast floorplanning by look-ahead enabled recursive bipartitioning
    • CONG, J., ROMESIS, M., AND SHINNERL, J. R. 2005a. Fast floorplanning by look-ahead enabled recursive bipartitioning. In Proceedings of ASP-DAC, pp. 1119-1122.
    • (2005) Proceedings of ASP-DAC , pp. 1119-1122
    • CONG, J.1    ROMESIS, M.2    SHINNERL, J.R.3
  • 5
    • 33748626715 scopus 로고    scopus 로고
    • Robust mixed-size placement under tight white-space constraints
    • CONG, J., ROMESIS, M., AND SHINNERL, J. R. 2005b. Robust mixed-size placement under tight white-space constraints. In Proceedings of ICCAD, pp. 165-172.
    • (2005) Proceedings of ICCAD , pp. 165-172
    • CONG, J.1    ROMESIS, M.2    SHINNERL, J.R.3
  • 6
    • 33745968360 scopus 로고    scopus 로고
    • A robust detailed placement for mixed-size IC designs
    • CONG, J. AND XIE, M. 2006. A robust detailed placement for mixed-size IC designs. In Proceedings of ASP-DAC, pp. 188-194.
    • (2006) Proceedings of ASP-DAC , pp. 188-194
    • CONG, J.1    XIE, M.2
  • 7
    • 33745967691 scopus 로고    scopus 로고
    • Architecture and details of a high quality, large-scale analytical placer
    • KAHNG, A. B., REDA, S., AND WANG, Q. 2005. Architecture and details of a high quality, large-scale analytical placer. In Proceedings of ICCAD, pp. 891-898.
    • (2005) Proceedings of ICCAD , pp. 891-898
    • KAHNG, A.B.1    REDA, S.2    WANG, Q.3
  • 10
    • 33746056861 scopus 로고    scopus 로고
    • Optimal rectangle packing: A meta-CSP approach
    • MOFFITT, M. D., AND POLLACK., M. E. 2006. Optimal rectangle packing: a meta-CSP approach. In Proceedings of ICAPS, pp. 93-102.
    • (2006) Proceedings of ICAPS , pp. 93-102
    • MOFFITT, M.D.1    POLLACK, M.E.2
  • 11
    • 0006685403 scopus 로고    scopus 로고
    • Post-placement residual-overlap removal with minimal movement
    • NAG, S. AND CHAUDHARY, K. 1999. Post-placement residual-overlap removal with minimal movement, In Proceedings of DATE, pp. 581-586.
    • (1999) In Proceedings of DATE , pp. 581-586
    • NAG, S.1    CHAUDHARY, K.2
  • 15
    • 84962289614 scopus 로고    scopus 로고
    • A unified method to handle different kinds of placement constraints in floorplan design
    • YOUNG, E., HO, M. L., AND CHU, C 2002. A unified method to handle different kinds of placement constraints in floorplan design. In Proceedings of ASP-DAC, pp. 661-670.
    • (2002) Proceedings of ASP-DAC , pp. 661-670
    • YOUNG, E.1    HO, M.L.2    CHU, C.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.