A unified method to handle different kinds of placement constraints in floorplan design

Proceedings - 7th Asia and South Pacific Design Automation Conference, 15th International Conference on VLSI Design, ASP-DAC/VLSI Design 2002

Volumn , Issue , 2002, Pages 661-667

  Young, E F Y ^a   Chu, C C N ^b   Ho, M L ^a  

^a CHINESE UNIVERSITY OF HONG KONG   (Hong Kong)

^b Iowa State University of Science and Technology   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALUMINUM; COMPUTER AIDED DESIGN; CONCRETE BEAMS AND GIRDERS; EMBEDDED SYSTEMS;

BENCHMARK DATA; BOUNDARY CONSTRAINTS; DATA PATHS; FLOORPLAN DESIGN; INCREMENTAL UPDATES; RANGE CONSTRAINTS; REDUCED GRAPHS; UNIFIED METHOD;

DESIGN;

EID: 84962289614     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2002.995011     Document Type: Conference Paper

References (9)

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