-
1
-
-
84937650904
-
Electromigration - A Brief Survey and Some Recent Results
-
J. R. Black, "Electromigration - A Brief Survey and Some Recent Results", IEEE Trans. Electron Devices, vol. ED-16, pp. 338-347, 1969.
-
(1969)
IEEE Trans. Electron Devices
, vol.ED-16
, pp. 338-347
-
-
Black, J.R.1
-
4
-
-
33947226035
-
Temperature-Aware Placement for SOCs
-
Aug
-
J.-L. Tsai, C. C-P. Chen, G. Chen, B. Goplen, H. Qian, Y. Zhan, S.-M. Kang, M. D. F. Wong, and S. S. Sapatnekar, "Temperature-Aware Placement for SOCs", in IEEE Special Issue on On-Chip Thermal Engineering, Aug., 2006, pp. 1502-1518.
-
(2006)
IEEE Special Issue on On-Chip Thermal Engineering
, pp. 1502-1518
-
-
Tsai, J.-L.1
Chen, C.C.-P.2
Chen, G.3
Goplen, B.4
Qian, H.5
Zhan, Y.6
Kang, S.-M.7
Wong, M.D.F.8
Sapatnekar, S.S.9
-
6
-
-
85013303687
-
Temperature Effects on MOS Transistors
-
R. Cobbold, "Temperature Effects on MOS Transistors", Electronic Letters, vol. 2, pp. 190-192, 1966.
-
(1966)
Electronic Letters
, vol.2
, pp. 190-192
-
-
Cobbold, R.1
-
9
-
-
0028424454
-
Efficient Local Search with Search Space Smoothing: A Case Study of the Traveling Salesman Problem (TSP)
-
J. Gu and X. Huang, "Efficient Local Search with Search Space Smoothing: A Case Study of the Traveling Salesman Problem (TSP)," in IEEE Trans. Systems, Man and Cybernetics 24(5) (1994), pp. 728-735.
-
(1994)
IEEE Trans. Systems, Man and Cybernetics
, vol.24
, Issue.5
, pp. 728-735
-
-
Gu, J.1
Huang, X.2
-
10
-
-
29244444803
-
Scaling Analysis of Multilevel Interconnect Temperatures for HighPerformance ICs
-
S. Im, N. Srivastava, K. Banerjee, and K. E. Goodson, "Scaling Analysis of Multilevel Interconnect Temperatures for HighPerformance ICs", IEEE Trans. on Electron Devices, 52(12), 2005.
-
(2005)
IEEE Trans. on Electron Devices
, vol.52
, Issue.12
-
-
Im, S.1
Srivastava, N.2
Banerjee, K.3
Goodson, K.E.4
-
11
-
-
2942682815
-
Implementation and Extensibility of an Analytic Placer
-
A. B. Kahng and Q. Wang, "Implementation and Extensibility of an Analytic Placer", Proc. Int. Symp. Physical Design, 2004, pp. 18-25.
-
(2004)
Proc. Int. Symp. Physical Design
, pp. 18-25
-
-
Kahng, A.B.1
Wang, Q.2
-
16
-
-
18744376720
-
Non-Linear Optimization System and Method for Wire Length and Delay Optimization for an Automatic Electric Circuit Placer
-
US Patent 6301693, Oct
-
W. Naylor et al., "Non-Linear Optimization System and Method for Wire Length and Delay Optimization for an Automatic Electric Circuit Placer", US Patent 6301693, Oct. 2001.
-
(2001)
-
-
Naylor, W.1
-
17
-
-
0032139262
-
PRIMA: Passive Reduced-Order Interconnect Macromodeling Algorithm
-
A. Odabasioglu, M. Celik and L. T. Pileggi, "PRIMA: Passive Reduced-Order Interconnect Macromodeling Algorithm," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, 17(8), 1998, pp. 645-654.
-
(1998)
IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems
, vol.17
, Issue.8
, pp. 645-654
-
-
Odabasioglu, A.1
Celik, M.2
Pileggi, L.T.3
-
18
-
-
33947207004
-
-
M.. Pedram and S. Nazarian, Thermal Modeling, Analysis and Management in VLSI Circuits: Principles and Methods, IEEE Special Issue on On-Chip Thermal Engineering, Aug. 2006, pp. 1487-1501.
-
M.. Pedram and S. Nazarian, "Thermal Modeling, Analysis and Management in VLSI Circuits: Principles and Methods", IEEE Special Issue on On-Chip Thermal Engineering, Aug. 2006, pp. 1487-1501.
-
-
-
-
19
-
-
35048890840
-
Safe Operating Area and Thermal Design for MOS Power Transistors
-
R. Severns, "Safe Operating Area and Thermal Design for MOS Power Transistors", in Siliconix Application Note AN83-10, 1983.
-
(1983)
Siliconix Application Note AN83-10
-
-
Severns, R.1
-
20
-
-
0033871060
-
Cell-Level Placement for Improving Substrate Thermal Distribution
-
C.-H. Tsai and S.-M. Kang, "Cell-Level Placement for Improving Substrate Thermal Distribution", in IEEE Trans. on ComputerAided Design, 19(2), pp. 253-266, 2000.
-
(2000)
IEEE Trans. on ComputerAided Design
, vol.19
, Issue.2
, pp. 253-266
-
-
Tsai, C.-H.1
Kang, S.-M.2
-
22
-
-
2942639682
-
FastPlace: Efficient Analytical Placement Using Cell Shifting, Iterative Local. Refinement and a Hybrid Net Model
-
N. Viswanathan and C. C.-N. Chu, "FastPlace: Efficient Analytical Placement Using Cell Shifting, Iterative Local. Refinement and a Hybrid Net Model", Proc. Int. Symp. Physical Design, 2004, pp. 26-33.
-
(2004)
Proc. Int. Symp. Physical Design
, pp. 26-33
-
-
Viswanathan, N.1
Chu, C.C.-N.2
-
23
-
-
84861418911
-
Fast Computation of the Temperature Distribution in VLSI Chips Using the Discrete Cosine Transform and Table Look-up
-
Y. Zhan and S. S. Sapatnekar, "Fast Computation of the Temperature Distribution in VLSI Chips Using the Discrete Cosine Transform and Table Look-up", in Proc. Asia and South Pacific Design Automation Conference, pp. 87-92, 2005.
-
(2005)
Proc. Asia and South Pacific Design Automation Conference
, pp. 87-92
-
-
Zhan, Y.1
Sapatnekar, S.S.2
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