A two-level load/store queue based on execution locality

Proceedings - International Symposium on Computer Architecture

Volumn , Issue , 2008, Pages 25-36

  Pericàs, Miquel ^a,b   Cristal, Adrian ^b   Cazorla, Francisco J ^b   González, Ruben ^a   Veidenbaum, Alex ^d   Jiménez, Daniel A ^c   Valero, Mateo ^a,b  

^a UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

^b BARCELONA SUPERCOMPUTING CENTER   (Spain)

^c UNIVERSITY OF TEXAS AT SAN ANTONIO   (United States)

^d UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATIONS.; INSTRUCTION WINDOWS; INTERNATIONAL SYMPOSIUM; LOAD STORE QUEUE; LOW POWERS; MULTI-CORE PROCESSORS; NEW DESIGN; OUT-OF-ORDER; PROCESSOR DESIGNS; SEQUENTIAL ALGORITHMS; THREAD-LEVEL PARALLELISM; WINDOW ENVIRONMENT;

COMPUTER SCIENCE; COMPUTER SYSTEMS; COMPUTERS; QUEUEING THEORY; RETAIL STORES; WINDOWS;

COMPUTER ARCHITECTURE;

EID: 52649144422     PISSN: 10636897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCA.2008.10     Document Type: Conference Paper

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