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Volumn 1, Issue , 2008, Pages 73-78

Supply voltage reduction in SRAMs: Impact on static noise margins

Author keywords

[No Author keywords available]

Indexed keywords

6T-SRAM; HSPICE SIMULATIONS; INTERNATIONAL CONFERENCES; NANOMETRIC; PROCESS VARIATIONS; SRAM MODULE; STATIC NOISE; STATIC POWER CONSUMPTION; STATIC-NOISE MARGIN; SUPPLY VOLTAGE REDUCTION; SUPPLY VOLTAGES;

EID: 51949113475     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/AQTR.2008.4588710     Document Type: Conference Paper
Times cited : (15)

References (10)
  • 2
    • 0023437909 scopus 로고    scopus 로고
    • E. Seevinck, F. J. List and J. Lohstroh, Static-noise margin alalysis os MOS SRAM cells, IEEE Journal of Solid-State Circuits, sc-22, no. 5, pp. 748-754, October 1987.
    • E. Seevinck, F. J. List and J. Lohstroh, "Static-noise margin alalysis os MOS SRAM cells," IEEE Journal of Solid-State Circuits, vol. sc-22, no. 5, pp. 748-754, October 1987.
  • 3
    • 0035308547 scopus 로고    scopus 로고
    • The impact of intrinsic device fluctuations on CMOS SRAM cell stability
    • April
    • A. Bhavnagarwala, X. Tang and J. D. Meindl, "The impact of intrinsic device fluctuations on CMOS SRAM cell stability," IEEE Journal of Solid-State Circuits, vol. 36, no. 4, April, 2001.
    • (2001) IEEE Journal of Solid-State Circuits , vol.36 , Issue.4
    • Bhavnagarwala, A.1    Tang, X.2    Meindl, J.D.3
  • 4
    • 33746369469 scopus 로고    scopus 로고
    • Static noise margin variation for sub-threshold SRAM in 65nm CMOS
    • July
    • B. H. Calhoun and A. Chandrakasan, "Static noise margin variation for sub-threshold SRAM in 65nm CMOS," Journal of Solid-State Circuits, vol. 41, no. 7, pp. 1673-1679, July 2006.
    • (2006) Journal of Solid-State Circuits , vol.41 , Issue.7 , pp. 1673-1679
    • Calhoun, B.H.1    Chandrakasan, A.2
  • 5
    • 33646391916 scopus 로고    scopus 로고
    • Static noise margin analysis of sub-threshold SRAM cells in deep submicron technology
    • A. Welling and J Zory, "Static noise margin analysis of sub-threshold SRAM cells in deep submicron technology," Lecture Notes in Computer Science, vol. 3728, pp. 488-497, 2005.
    • (2005) Lecture Notes in Computer Science , vol.3728 , pp. 488-497
    • Welling, A.1    Zory, J.2
  • 10
    • 37249034179 scopus 로고    scopus 로고
    • The impact of random device variation on SRAM cell stability in sub-90-nm CMOS technologies
    • January
    • K. Agarwal and S. Nassif, "The impact of random device variation on SRAM cell stability in sub-90-nm CMOS technologies," IEEE Transactions on Very Large Scale Integration Systems, vol. 16, no. 1, pp. 86-96, January 2008.
    • (2008) IEEE Transactions on Very Large Scale Integration Systems , vol.16 , Issue.1 , pp. 86-96
    • Agarwal, K.1    Nassif, S.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.