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Volumn 3728 LNCS, Issue , 2005, Pages 488-497

Static noise margin analysis of sub-threshold SRAM cells in deep sub-micron technology

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; COMPUTER SIMULATION; ELECTRIC POWER SYSTEMS; MICROELECTRONICS; THRESHOLD VOLTAGE;

EID: 33646391916     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/11556930_50     Document Type: Conference Paper
Times cited : (4)

References (13)
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    • Architecting voltage islands in core-based system-on-a-chip designs
    • Newport Beach, USA
    • J. Hu et al.: Architecting Voltage Islands in Core-based System-on-a-Chip Designs. In: Int. Symp. on Low Power Electronics and Design, Newport Beach, USA (2004) 180-185
    • (2004) Int. Symp. on Low Power Electronics and Design , pp. 180-185
    • Hu, J.1
  • 2
    • 0346267670 scopus 로고    scopus 로고
    • Review and future prospects of low-voltage RAM circuits
    • Y. Nakagome, M. Horiguchi, T. Kawahara and K. Itoh.: Review and future prospects of low-voltage RAM circuits. In: IBM R&D Journal, Vol. 47, No. 6, (2003) 525-551
    • (2003) IBM R&D Journal , vol.47 , Issue.6 , pp. 525-551
    • Nakagome, Y.1    Horiguchi, M.2    Kawahara, T.3    Itoh, K.4
  • 3
    • 33646864552 scopus 로고    scopus 로고
    • Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits
    • K. Roy et al.: Leakage Current Mechanisms and Leakage Reduction Techniques in Deep-Submicrometer CMOS Circuits. In: Proceedings of the IEEE, Vol. 91, No 2, (2003) 305-327
    • (2003) Proceedings of the IEEE , vol.91 , Issue.2 , pp. 305-327
    • Roy, K.1
  • 4
    • 0033672408 scopus 로고    scopus 로고
    • Gated-vdd - A circuit technique to reduce leakage in deep-submicron cache memories
    • Rapallo, Italy
    • M. Powell et al.: Gated-Vdd - A circuit technique to reduce leakage in deep-submicron cache memories. In: Int. Symp. on Low Power Electronics and Design, Rapallo, Italy (2000) 90-95
    • (2000) Int. Symp. on Low Power Electronics and Design , pp. 90-95
    • Powell, M.1
  • 6
    • 2942687683 scopus 로고    scopus 로고
    • SRAM leakage suppression by minimizing standby supply voltage
    • San Jose, USA
    • H. Qin et al.: SRAM Leakage Suppression by Minimizing Standby Supply Voltage. In: 5th Int. Symposium on Quality Electronic Design, San Jose, USA (2004) 55-60
    • (2004) 5th Int. Symposium on Quality Electronic Design , pp. 55-60
    • Qin, H.1
  • 8
    • 33646423645 scopus 로고    scopus 로고
    • STMicroelectronics, http://www.st.com/stonline/prodpres/dedicate/soc/ asic/90plat.htm
  • 10
    • 0035308547 scopus 로고    scopus 로고
    • The impact of intrinsic device fluctuations on CMOS SRAM cell stability
    • A.J. Bhavnagarwala et al.: The Impact of Intrinsic Device Fluctuations on CMOS SRAM Cell Stability. In: IEEE Journal of solid-state circuits, Vol. 36, No. 4, (2001) 658-665
    • (2001) IEEE Journal of Solid-state Circuits , vol.36 , Issue.4 , pp. 658-665
    • Bhavnagarwala, A.J.1
  • 11
    • 85085632953 scopus 로고    scopus 로고
    • rd Generation partner project, http://www.3gpp.org
  • 12
    • 34247629798 scopus 로고    scopus 로고
    • A combined hardware-software approach for low-power SoCs - Applying adaptive voltage scaling and intelligent energy management software
    • K. Flautner and D. Flynn.: A Combined Hardware-Software Approach for Low-Power SoCs - Applying Adaptive Voltage Scaling and Intelligent Energy Management Software. In: DesignCon 2003, http://www.arm.com
    • DesignCon 2003
    • Flautner, K.1    Flynn, D.2
  • 13
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    • Convergence of proportional-fair sharing algorithms under general conditions
    • H.J. Kushner and P.A. Whiting.: Convergence of proportional-fair sharing algorithms under general conditions. In: IEEE Trans. on Wireless Communications, Vol. 3, Issue 4, (2004) 1250-1259
    • (2004) IEEE Trans. on Wireless Communications , vol.3 , Issue.4 , pp. 1250-1259
    • Kushner, H.J.1    Whiting, P.A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.