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Volumn 5168 LNCS, Issue , 2008, Pages 327-336

Low-cost adaptive data prefetching

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE POLICIES; ART HARDWARE; CURRENT PROCESSORS; DATA PREFETCHING; HIGH CAPACITY; HIGH-BANDWIDTH; LOW COSTS; ON-CHIP MEMORIES; PARALLEL PROCESSING; PERFORMANCE LOSSES; PRE-FETCHING; PREFETCH; SUPER SCALAR;

EID: 51849123297     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-85451-7_36     Document Type: Conference Paper
Times cited : (3)

References (30)
  • 1
    • 0026267802 scopus 로고    scopus 로고
    • Baer, J.L., Chen, T.F.: An Effective On-chip Preloading Scheme to Reduce Data Access Penalty. In: ICS, pp. 176-186 (1991)
    • Baer, J.L., Chen, T.F.: An Effective On-chip Preloading Scheme to Reduce Data Access Penalty. In: ICS, pp. 176-186 (1991)
  • 3
    • 0035188352 scopus 로고    scopus 로고
    • Burger, D., et al.: Filtering Superfluous Prefetches Using Density Vectors. In: ICCD, p. 124 (2001)
    • Burger, D., et al.: Filtering Superfluous Prefetches Using Density Vectors. In: ICCD, p. 124 (2001)
  • 4
    • 51849105386 scopus 로고    scopus 로고
    • Charney, M.J., Reeves, A.P.: Generalized correlation-based hardware prefetching. TR EECEG-95-1, School of Electrical Engineering, Cornell Univ. (February 1995)
    • Charney, M.J., Reeves, A.P.: Generalized correlation-based hardware prefetching. TR EECEG-95-1, School of Electrical Engineering, Cornell Univ. (February 1995)
  • 5
    • 0345272014 scopus 로고    scopus 로고
    • Cooksey, R., et al.: A Stateless, Content-Directed Data Prefetching Mechanism. In: ASPLOS-X, S. Jose, CA, pp. 279-290 (October 2002)
    • Cooksey, R., et al.: A Stateless, Content-Directed Data Prefetching Mechanism. In: ASPLOS-X, S. Jose, CA, pp. 279-290 (October 2002)
  • 6
    • 84965078406 scopus 로고    scopus 로고
    • Dahlgren, F., et al.: Fixed and Adaptive Sequential Prefetching in Shared-Memory Multiprocessors. In: ICPP, pp. 156-163. CRC Press, Boca Raton (1993)
    • Dahlgren, F., et al.: Fixed and Adaptive Sequential Prefetching in Shared-Memory Multiprocessors. In: ICPP, pp. 156-163. CRC Press, Boca Raton (1993)
  • 7
    • 0030121135 scopus 로고    scopus 로고
    • Evaluation of Hardware-Based Stride and Sequential Prefetching in Shared-Memory Multiprocessors
    • Dahlgren, F., Stenström, P.: Evaluation of Hardware-Based Stride and Sequential Prefetching in Shared-Memory Multiprocessors. IEEE Trans. Parallel and Distributed Systems 7(4), 385-398 (1996)
    • (1996) IEEE Trans. Parallel and Distributed Systems , vol.7 , Issue.4 , pp. 385-398
    • Dahlgren, F.1    Stenström, P.2
  • 9
    • 0034832276 scopus 로고    scopus 로고
    • Goeman, B., et al.: Differential FCM: Increasing Value Prediction Accuracy by Improving Table Usage Efficiency. In: HPCA-7, Monterrey, Mexico, pp. 207-218 (2001)
    • Goeman, B., et al.: Differential FCM: Increasing Value Prediction Accuracy by Improving Table Usage Efficiency. In: HPCA-7, Monterrey, Mexico, pp. 207-218 (2001)
  • 10
    • 17644388982 scopus 로고    scopus 로고
    • Gracia, D., et al.: MicroLib: A Case for the Quantitative Comparison of MicroArchitecture Mechanisms. MICRO-37, 43-54 (2004)
    • Gracia, D., et al.: MicroLib: A Case for the Quantitative Comparison of MicroArchitecture Mechanisms. MICRO-37, 43-54 (2004)
  • 12
    • 40349103955 scopus 로고    scopus 로고
    • Hur, I., Lin, C.: Memory Prefetching Using Adaptive Stream Detection. MICRO-39, 397-408 (2006)
    • Hur, I., Lin, C.: Memory Prefetching Using Adaptive Stream Detection. MICRO-39, 397-408 (2006)
  • 13
    • 0031639445 scopus 로고    scopus 로고
    • Ibáñez, P., et al.: Characterization and Improvement of Load/Store Cache-based Prefetching. In: ICS, Melbourne, Australia, pp. 369-376 (July 1998)
    • Ibáñez, P., et al.: Characterization and Improvement of Load/Store Cache-based Prefetching. In: ICS, Melbourne, Australia, pp. 369-376 (July 1998)
  • 15
    • 0025429331 scopus 로고    scopus 로고
    • Jouppi, N.: Improving direct-mapped cache performance by addition of a small fully associative cache and prefetch buffers. In: ISCA-17, Seattle, WA (1990)
    • Jouppi, N.: Improving direct-mapped cache performance by addition of a small fully associative cache and prefetch buffers. In: ISCA-17, Seattle, WA (1990)
  • 16
    • 3042669130 scopus 로고    scopus 로고
    • IBM Power5 chip: A dual-core multithreaded processor
    • Kalla, R., et al.: IBM Power5 chip: A dual-core multithreaded processor. IEEE Micro. 24(2), 40-47 (2004)
    • (2004) IEEE Micro , vol.24 , Issue.2 , pp. 40-47
    • Kalla, R.1
  • 17
    • 51849109241 scopus 로고    scopus 로고
    • Krewell, K.: Fujitsu Makes SPARC See Double. Microproc. Report (November 2003)
    • Krewell, K.: Fujitsu Makes SPARC See Double. Microproc. Report (November 2003)
  • 19
    • 0035188352 scopus 로고    scopus 로고
    • Filtering superfluous prefetches using density vectors
    • Washington D.C, USA, pp, IEEE Comp. Society, Los Alamitos
    • Lin, W.F., et al.: Filtering superfluous prefetches using density vectors. In: ICCD 2001, Washington D.C., USA, pp. 124-132. IEEE Comp. Society, Los Alamitos (2001)
    • (2001) ICCD , pp. 124-132
    • Lin, W.F.1
  • 20
    • 2342644731 scopus 로고    scopus 로고
    • Nesbit, K.J., Smith, J.E.: Data Cache Prefetching Using a Global History Buffer. In: HPCA-10, Madrid, Spain, pp. 96-105 (2004)
    • Nesbit, K.J., Smith, J.E.: Data Cache Prefetching Using a Global History Buffer. In: HPCA-10, Madrid, Spain, pp. 96-105 (2004)
  • 21
    • 17644375823 scopus 로고    scopus 로고
    • Data Cache Prefetching Using a Global History Buffer
    • Nesbit, K.J., Smith, J.E.: Data Cache Prefetching Using a Global History Buffer. IEEE Micro. 25(3), 90-97 (2005)
    • (2005) IEEE Micro , vol.25 , Issue.3 , pp. 90-97
    • Nesbit, K.J.1    Smith, J.E.2
  • 22
    • 51849103077 scopus 로고    scopus 로고
    • Ramos, L.M., et al.: Data prefetching in a cache hierarchy with high bandwidth and capacity. SIGARCH Comput. Archit. News 35(4), 37-44 (2007), http://doi.acm.org/10.1145/1327312.1327319
    • Ramos, L.M., et al.: Data prefetching in a cache hierarchy with high bandwidth and capacity. SIGARCH Comput. Archit. News 35(4), 37-44 (2007), http://doi.acm.org/10.1145/1327312.1327319
  • 23
    • 0037340044 scopus 로고    scopus 로고
    • A Decoupled Predictor-Directed Stream Prefetching Architecture
    • Sair, S., et al.: A Decoupled Predictor-Directed Stream Prefetching Architecture. IEEE Trans. on Computers 52(3), 260-276 (2003)
    • (2003) IEEE Trans. on Computers , vol.52 , Issue.3 , pp. 260-276
    • Sair, S.1
  • 24
    • 85085717875 scopus 로고    scopus 로고
    • Sherwood, T., et al.: Automatically Characterizing Large Scale Program Behaviour. In: ASPLOS-X (October 2002)
    • Sherwood, T., et al.: Automatically Characterizing Large Scale Program Behaviour. In: ASPLOS-X (October 2002)
  • 25
    • 0018106484 scopus 로고
    • Sequential Program Prefetching in Memory Hierarchies
    • Smith, A.J.: Sequential Program Prefetching in Memory Hierarchies. IEEE Trans. on Computers 11(12), 7-21 (1978)
    • (1978) IEEE Trans. on Computers , vol.11 , Issue.12 , pp. 7-21
    • Smith, A.J.1
  • 30
    • 85008018780 scopus 로고    scopus 로고
    • Reducing Cache Pollution via Dynamic Data Prefetch Filtering
    • Zhuang, X., Lee, H.-H.S.: Reducing Cache Pollution via Dynamic Data Prefetch Filtering. IEEE Trans. on computers 56(1), 18-31 (2007)
    • (2007) IEEE Trans. on computers , vol.56 , Issue.1 , pp. 18-31
    • Zhuang, X.1    Lee, H.-H.S.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.