NoC power estimation at the RTL abstraction level

Proceedings - IEEE Computer Society Annual Symposium on VLSI: Trends in VLSI Technology and Design, ISVLSI 2008

Volumn , Issue , 2008, Pages 475-478

  Guindani, Guilherme ^a   Reinbrecht, Cezar ^a   Raupp, Thiago ^a   Calazans, Ney ^a   Moraes, Fernando Gehm ^a  

^a PONTIFICAL CATHOLIC UNIVERSITY OF RIO GRANDE DO SUL   (Brazil)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC NETWORK TOPOLOGY; ELECTRONICS INDUSTRY; INTEGRATED CIRCUITS; TECHNOLOGY;

ABSTRACTION LEVELS; CURRENT POWER; ELECTRONIC DEVICES; EXECUTION TIME; INDUSTRIAL POWER; LOW-POWER TECHNIQUES; MULTICAST SERVICES; NOC DESIGN; POWER ESTIMATIONS; VLSI TECHNOLOGIES;

ESTIMATION;

EID: 51849088149     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISVLSI.2008.17     Document Type: Conference Paper

References (10)

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