Race Logic Architecture (RALA): A novel logic concept using the race scheme of input variables

IEEE Journal of Solid-State Circuits

Volumn 37, Issue 2, 2002, Pages 191-201

  Lee, Se Joong ^a   Yoo, Hoi Jun ^a  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

High speed integrated circuit; Logic design; Logic family; Race logic; RALA

Indexed keywords

ALGORITHMS; BOOLEAN FUNCTIONS; LOGIC DESIGN; LOGIC GATES; SWITCHES;

RACE LOGIC ARCHITECTURES (RALA);

CMOS INTEGRATED CIRCUITS;

EID: 0036474883     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.982425     Document Type: Article

References (10)

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8. Integration of asynchronous and self-checking multiple-valued current-mode circuits based on dual-rail differential logic
9. A novel high speed low power logic family: Race logic
10. Matching properties of MOS transistors