A high-speed magnitude comparator with small transistor count

Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Volumn 3, Issue , 2003, Pages 1168-1171

  Cheng, Shun Wen ^a  

^a TAMKANG UNIVERSITY   (Taiwan)

Author keywords

CMOS; Conditional sum adder; Digital comparator; Digital IC and VLSI; L's complement; Magnitude comparator; Sorter

Indexed keywords

CMOS; CONDITIONAL SUM ADDER; DIGITAL COMPARATORS; DIGITAL IC; L'S COMPLEMENT; MAGNITUDE COMPARATOR; SORTER;

ADDERS; CMOS INTEGRATED CIRCUITS; COMPARATOR CIRCUITS; INTEGRATED CIRCUITS; VLSI CIRCUITS; COMPARATORS (OPTICAL); COST EFFECTIVENESS; INTEGRATED CIRCUIT DESIGN;

COMPARATORS (OPTICAL); ADDERS;

EID: 44849121717     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICECS.2003.1301720     Document Type: Conference Paper

References (8)

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