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Volumn 38, Issue 2, 2003, Pages 254-262

High-performance and power-efficient CMOS comparators

Author keywords

CMOS dynamic circuit; Comparator; Multilevel lookahead; Multiple output domino logic (MODL); Priority encoding

Indexed keywords

ALGORITHMS; COMPARATOR CIRCUITS; COMPUTER SIMULATION; INTEGRATED CIRCUIT LAYOUT; TRANSISTORS;

EID: 0037323076     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2002.807409     Document Type: Article
Times cited : (68)

References (14)
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    • J.-S. Wang and C.-S. Huang, "A high-speed single-phase-clocked CMOS priority encoder," in Proc. IEEE Int. Symp. Circuit and Systems, vol. 5, May 2000, pp. 537-540.
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.