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1
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0034827298
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Studies on A Novel Flip-Chip Interconnect Structure - Pillar Bump
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Orlando, FL, June
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st Electronic Components and Technology Conf., Orlando, FL, June 2001, pp. 945-949.
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(2001)
st Electronic Components and Technology Conf
, pp. 945-949
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Wang, T.1
Tung, F.2
Foo, L.3
Dutta, V.4
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2
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33845567569
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Copper Die Bumps (First Level Interconnect) and Low-K Dielectrics in 65nm High Volume Manufacturing
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San Diego, CA, June
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A. Yeoh, M. Chang, C. Pelto, T.-L. Huang, S. Balakrishnan, G. Leatherman, S. Agraharam, G. Wang, Z. Wang, D. Chiang, P. Stover, P. Brandenburger, "Copper Die Bumps (First Level Interconnect) and Low-K Dielectrics in 65nm High Volume Manufacturing", Proc 56th Electronic Components and Technology Conf., San Diego, CA, June 2006, pp. 1611-1615.
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(2006)
Proc 56th Electronic Components and Technology Conf
, pp. 1611-1615
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Yeoh, A.1
Chang, M.2
Pelto, C.3
Huang, T.-L.4
Balakrishnan, S.5
Leatherman, G.6
Agraharam, S.7
Wang, G.8
Wang, Z.9
Chiang, D.10
Stover, P.11
Brandenburger, P.12
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3
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50049083814
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Reliability Study on Copper Pillar Bumping with Lead Free Solder
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Singapore, Dec
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th Electronics Packaging Technology Conference, Singapore, Dec. 2007, pp. 618-622.
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(2007)
th Electronics Packaging Technology Conference
, pp. 618-622
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Yu, J.1
Anand, A.2
Mui, Y.C.3
Srinivasan, P.4
Master, R.5
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4
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33845595319
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Copper Interconnections for High Performance and Fine Pitch Flipchip Digital Applications and Ultra-miniaturized RF ModuleApplications
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San Diego, CA, June
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th Electronic Components and Technology Conf., San Diego, CA, June 2006, pp. 102-111.
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(2006)
th Electronic Components and Technology Conf
, pp. 102-111
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Tummala, R.1
Raj, P.2
Aggarwal, A.3
Mehrotra, G.4
Koh, S.W.5
Bansal, S.6
Tiong, T.T.7
Ong, C.K.8
Chew, J.9
Vaidyanathan, K.10
Rao, V.S.11
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5
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33845566147
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Electromigration in Pbfree Solder Bumps with Cu Column as Flip Chip Joints
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San Diego, CA, June
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th Electronic Components and Technology Conf., San Diego, CA, June 2006, pp. 657-662.
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(2006)
th Electronic Components and Technology Conf
, pp. 657-662
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Nah, J.-W.1
Suh, J.O.2
Tu, K.N.3
Yoon, S.W.4
Chong, C.T.5
Kripesh, V.6
Su, B.R.7
Chen, C.8
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6
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35348922225
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Electromigration Study in Flip Chip Solder Joints
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Reno, NV, June
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th Electronic Components and Technology Conf., Reno, NV, June 2007, pp. 1450-1455.
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(2007)
th Electronic Components and Technology Conf
, pp. 1450-1455
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Nah, J.-W.1
Chen, K.2
Suh, J.O.3
Tu, K.N.4
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7
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79958223410
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Current crowding induced electromigration failure in flip chip solder joints
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E. C. C. Yeh, W. J. Choi, and K. N. Tu, "Current crowding induced electromigration failure in flip chip solder joints", Appl. Phys. Lett., 80 (2002), pp. 580-582.
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(2002)
Appl. Phys. Lett
, vol.80
, pp. 580-582
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Yeh, E.C.C.1
Choi, W.J.2
Tu, K.N.3
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8
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10444263718
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Qualification of SnAg Solder Bumps for Lead-free Flip Chip Applications
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Las Vegas, NV, June
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th Electronic Components and Technology Conf., Las Vegas, NV, June 2004, pp. 683-691.
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(2004)
th Electronic Components and Technology Conf
, pp. 683-691
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Ebersberger, B.1
Bauer, R.2
Alexa, L.3
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9
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24644488440
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Reliability of Leadfree SnAg Solder Bumps: Influence of Electromigration and Temperature
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Orlando, FL, June
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th Electronic Components and Technology Conf., Orlando, FL, June 2005, pp. 1407-1415.
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(2005)
th Electronic Components and Technology Conf
, pp. 1407-1415
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Ebersberger, B.1
Bauer, R.2
Alexa, L.3
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10
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35348888344
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Are Intermetallics in Solder Joints Really Brittle?
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Reno, NV, June
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th Electronic Components and Technology Conf., Reno, NV, June 2007, pp. 648-652.
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(2007)
th Electronic Components and Technology Conf
, pp. 648-652
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Lee, C.1
Wang, P.J.2
Kim, J.S.3
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11
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51349094134
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JEDEC JEP154, Guideline for Characterizing Solder Bump Electromigration under Constant Current and Temperature Stress, Jan. 2008, www.jedec.org
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JEDEC JEP154, "Guideline for Characterizing Solder Bump Electromigration under Constant Current and Temperature Stress", Jan. 2008, www.jedec.org
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