Studies on a novel flip-chip interconnect structure - Pillar bump

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2001, Pages 945-949

  Wang, T ^a   Tung, F ^a   Foo, L ^a   Dutta, V ^a  

^a Questech Solutions Pte Ltd   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

COPPER ALLOYS; ELECTROPLATING; ENERGY DISPERSIVE SPECTROSCOPY; FAILURE ANALYSIS; FLIP CHIP DEVICES; RELIABILITY; SCANNING ELECTRON MICROSCOPY; SEMICONDUCTOR DEVICE STRUCTURES; SHEAR STRESS; SOLDERING ALLOYS; THERMAL CYCLING; TIN ALLOYS;

BUMP SHEAR TEST; BUMPING; EUTECTIC SOLDER CAP; FAILURE MODE; FLIP CHIP INTERCONNECT STRUCTURE; MOISTURE SENSITIVITY; PILLAR BUMP;

ELECTRONICS PACKAGING;

EID: 0034827298     PISSN: 05695503     EISSN: None     Source Type: Journal    
DOI: 10.1109/ECTC.2001.927917     Document Type: Article

References (0)