Energy-efficient and metastability-immune timing-error detection and recovery circuits for dynamic variation tolerance

Proceedings - 2008 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT

Volumn , Issue , 2008, Pages 155-158

  Bowman, Keith A ^a   Tschanz, James W ^a   Kim, Nam Sung ^a   Lee, Janice C ^a   Wilkerson, Chris B ^a   Lu, Shin Lien L ^a   Karnik, Tanay ^a   De, Vivek K ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AND RECOVERY; CIRCUIT TESTING; CLOCK FREQUENCIES; ENERGY-EFFICIENT; INTEGRATED CIRCUIT DESIGN; INTERNATIONAL CONFERENCES; META STABILITY; SUPPLY VOLTAGES; VARIATION TOLERANCES;

CONSERVATION; ELECTRONICS INDUSTRY; ENERGY EFFICIENCY; ERROR DETECTION; INTEGRATED CIRCUITS; NETWORKS (CIRCUITS); TECHNOLOGY; TIME MEASUREMENT; TIMING CIRCUITS;

INTEGRATED CIRCUIT MANUFACTURE;

EID: 50849119316     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICICDT.2008.4567268     Document Type: Conference Paper

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