New analog test metrics based on probabilistic and deterministic combination approaches

Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Volumn , Issue , 2007, Pages 82-85

  Abderrahman, A ^a   Sawan, M ^a   Savaria, Y ^a   Khouas, A ^a  

^a ÉCOLE POLYTECHNIQUE DE MONTRÉAL   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

CONTROL THEORY; DESIGN FOR TESTABILITY; DISCRETE FOURIER TRANSFORMS; NETWORKS (CIRCUITS); PROBABILITY; PROBABILITY DENSITY FUNCTION; TESTING;

ANALOG TESTING; FAULT COVERAGE; PARAMETRIC FAULTS;

PLASMA DIAGNOSTICS;

EID: 50649120143     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICECS.2007.4510936     Document Type: Conference Paper

References (8)

1. L. Milor, "A Tutorial Introduction to Research on Analog and Mixed-Signal Circuit Testing", IEEE Transactions on Circuits and Systems, vol. 45, no 10, pp. 1389-1407, 1998.
2. M. Sachdev and B. Atzema, "Industrial relevance of Analog IFA: A Fact or Fiction', Proc. IEEE Int. Test Conf. 1995, pp. 61-70.
3. Stephen Sunter, Naveena Nagi, "Test Metrics for Analog Parametric Faults", Proc. Of VLSI Test Symposium, pp. 226-234, 1999.
4. Ahcène Bounceur, Salvador Mir, Emmanuel Simeu and Luis Rolíndez., "Estimation of test metrics for the optimisation of analogue circuit testing", submitted to Journal of Electronic Testing: Theory and Applications (JETTA), 2007.
5. Viera Stopjakov́a, Pavol Malosek, Vladislav Nagy, "Neural Network-Based Defect Detection in Analog and Mixed IC Using Digital Signal Pre-processing", Journal of Electrical Engineering, vol. 57, no. 5, p. 249-257, 2006.
6. Tian, M.W., Shi, C.-J.R., "Rapid Frequency-domain Analog Fault Simulation Under Parameter Tolerances", Design Automation Conference, June 9-13, p.275-280, 1997.
7. Abdessatar Abderrahman, Y. Savaria, A. Khouas, M. Sawan, "Accurate Testability Analysis based-on Multi-frequency Test Generation and New Test Metric", to be published in Proc. of IEEE-MWSCAS/NEWCAS, 2007.
8. Abdessatar Abderrahman, Eduard Cerny, Kaminska Bozena, "Worst-Case Tolerance Analysis and CLP-Based Multi-frequency Test Generation for Analog Circuits", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 18, no. 3, p. 332-345, 1999.