메뉴 건너뛰기




Volumn 5, Issue 13, 2008, Pages 464-471

DSM: A heuristic dynamic spiral mapping algorithm for network on chip

Author keywords

Dynamic mapping algorithm; Network on chip; Task graph

Indexed keywords

CHLORINE COMPOUNDS; ELECTRIC LOAD MANAGEMENT; HEURISTIC ALGORITHMS; HEURISTIC METHODS; HEURISTIC PROGRAMMING;

EID: 48349143517     PISSN: None     EISSN: 13492543     Source Type: Journal    
DOI: 10.1587/elex.5.464     Document Type: Article
Times cited : (36)

References (8)
  • 2
    • 84893687806 scopus 로고    scopus 로고
    • A Generic Architecture for On-chip Packet Switched Interconnections
    • Paris, France, pp, March
    • P. Guerrier and A. Greiner, "A Generic Architecture for On-chip Packet Switched Interconnections," in Proc. DATE 2000, Paris, France, pp. 250-256, March 2000.
    • (2000) Proc. DATE , pp. 250-256
    • Guerrier, P.1    Greiner, A.2
  • 3
    • 46449119799 scopus 로고    scopus 로고
    • S. Saeidi, A. Khademzadeh, and A. Mehran, SMAP: An Intelligent Mapping Tool for Network on Chip, to be presented at ISSCS 2007, PID360581, Iasi, Romania, July 2007.
    • S. Saeidi, A. Khademzadeh, and A. Mehran, "SMAP: An Intelligent Mapping Tool for Network on Chip," to be presented at ISSCS 2007, PID360581, Iasi, Romania, July 2007.
  • 4
    • 27644494723 scopus 로고    scopus 로고
    • Key Research Problems in NoC Design: A Holistic Perspective
    • New Jersey, USA, pp, Sept. 19-21
    • Umit Y. Ogras and J. Hu, "Key Research Problems in NoC Design: A Holistic Perspective," in Proc. CODES+ISSS'05, New Jersey, USA, pp. 69-74, Sept. 19-21, 2005.
    • (2005) Proc. CODES+ISSS'05 , pp. 69-74
    • Ogras, U.Y.1    Hu, J.2
  • 5
    • 84954421164 scopus 로고    scopus 로고
    • Energy-Aware Mapping for Tile-based NoC Architectures Under Performance Constraints
    • Jan
    • J. Hu and R. Marculescu, "Energy-Aware Mapping for Tile-based NoC Architectures Under Performance Constraints," in Proc. ASP-DAC'03, pp. 233-239, Jan. 2003.
    • (2003) Proc. ASP-DAC'03 , pp. 233-239
    • Hu, J.1    Marculescu, R.2
  • 6
    • 34548569239 scopus 로고    scopus 로고
    • Spiral: Spiral: A Heuristic Mapping Algorithm for Network on Chip
    • Aug
    • A. Mehran, S. Saedi, A. Khademzadeh, and K. Badie, "Spiral: Spiral: A Heuristic Mapping Algorithm for Network on Chip," IEICE Electron. Exp., vol. 4, no. 15, pp. 478-484, Aug. 2007.
    • (2007) IEICE Electron. Exp , vol.4 , Issue.15 , pp. 478-484
    • Mehran, A.1    Saedi, S.2    Khademzadeh, A.3    Badie, K.4
  • 7
    • 84944322013 scopus 로고    scopus 로고
    • A Two-step Genetic Algorithm for Mapping Task Graphs to Network on Chip Architecture
    • Sept
    • T. Lei and S. Kumar, "A Two-step Genetic Algorithm for Mapping Task Graphs to Network on Chip Architecture," in Proc. DSD'03, pp. 180-187, Sept. 2003.
    • (2003) Proc. DSD'03 , pp. 180-187
    • Lei, T.1    Kumar, S.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.