Formal correctness of an automotive bus controller implementation at gate-level

IFIP International Federation for Information Processing

Volumn 271, Issue , 2008, Pages 57-67

  Alkassar, Eyad ^a   Böhm, Peter ^b   Knapp, Steffen ^a  

^a SAARLAND UNIVERSITY   (Germany)

^b UNIVERSITY OF OXFORD   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; MIDDLEWARE; MODEL CHECKING; SCHEDULING; THEOREM PROVING;

CONTROLLER IMPLEMENTATION; FORMAL CORRECTNESS; INTERACTIVE THEOREM PROVER; MESSAGE TRANSMISSIONS; MODEL CHECKER; REAL TIME PROTOCOLS; REAL-TIME SCHEDULERS; TIME-TRIGGERED ARCHITECTURES;

EMBEDDED SYSTEMS;

EID: 47249165713     PISSN: 15715736     EISSN: None     Source Type: Book Series    
DOI: 10.1007/978-0-387-09661-2_6     Document Type: Conference Paper

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