Realistic worst-case execution time analysis in the context of pervasive system verification

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 4444 LNCS, Issue , 2007, Pages 53-81

  Knapp, Steffen ^a   Paul, Wolfgang ^a  

^a SAARLAND UNIVERSITY   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

GATE DIELECTRICS; LOGIC DESIGN; PROGRAM PROCESSORS; REAL TIME SYSTEMS;

ELECTRONIC CONTROL UNIT (ECU); GATE LEVEL DESIGN; PROGRAM CORRECTNESS; REALISTIC WORST-CASE EXECUTION TIME (WCET) ANALYSIS;

UBIQUITOUS COMPUTING;

EID: 39149124177     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-71322-7_3     Document Type: Conference Paper

References (16)

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