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Volumn 42, Issue 7, 2006, Pages 415-417

Fabrication and characterisation of 200 mm germanium-on-insulator (GeOI) substrates made from bulk germanium

Author keywords

[No Author keywords available]

Indexed keywords

DEFECTS; GERMANIUM; INTEGRATED CIRCUITS; MEASUREMENT THEORY; ROUGHNESS MEASUREMENT; SILICON WAFERS;

EID: 33750200098     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20060208     Document Type: Article
Times cited : (74)

References (8)
  • 3
    • 79956011551 scopus 로고    scopus 로고
    • Monolithic integration of near-infrared Ge photodetector with Si complementary metal-oxide-semiconductor reactant electronics
    • Masini, G., Cencelli, V., Colace, L., De Notaristefani, F., and Assanto, G.: ' Monolithic integration of near-infrared Ge photodetector with Si complementary metal-oxide-semiconductor reactant electronics ', Appl. Phys. Lett., 2002, 80, (18), p. 3268
    • (2002) Appl. Phys. Lett. , vol.80 , Issue.18 , pp. 3268
    • Masini, G.1    Cencelli, V.2    Colace, L.3    De Notaristefani, F.4    Assanto, G.5
  • 4
    • 0029637854 scopus 로고
    • Silicon on insulator material technology
    • Bruel, M.: ' Silicon on insulator material technology ', Electron. Lett., 1995, 31, p. 1201
    • (1995) Electron. Lett. , vol.31 , pp. 1201
    • Bruel, M.1
  • 5
    • 33645556469 scopus 로고    scopus 로고
    • Umicore, Watertorenstraat 33, B-2250 Olen, Belgium
    • Umicore, Watertorenstraat 33, B-2250 Olen, Belgium
  • 7
    • 31844432924 scopus 로고    scopus 로고
    • 200 mm germanium-on-insulator (GEOI) structures realised from epitaxial wafers using the smart cut technology
    • Deguet, C.: ' 200 mm germanium-on-insulator (GEOI) structures realised from epitaxial wafers using the smart cut technology ', Electrochem. Soc. Proc., 2005, 2005-06, p. 78
    • (2005) Electrochem. Soc. Proc. , vol.2005 , Issue.6 , pp. 78
    • Deguet, C.1
  • 8
    • 0012022887 scopus 로고    scopus 로고
    • A review of the pseudo-MOS transistor in SOI wafers: Operation, parameter extraction and applications
    • Cristoloveanu, S., Munteanu, D., and Liu, M.S.T.: ' A review of the pseudo-MOS transistor in SOI wafers: operation, parameter extraction and applications ', IEEE Trans. Electron Devices, 2000, 47, (5), p. 1018
    • (2000) IEEE Trans. Electron Devices , vol.47 , Issue.5 , pp. 1018
    • Cristoloveanu, S.1    Munteanu, D.2    Liu, M.S.T.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.