An approach to placement-coupled logic replication

Proceedings - Design Automation Conference

Volumn , Issue , 2004, Pages 711-716

  Hrkić, Miloš ^a   Lillis, John ^a   Beraudo, Giancarlo ^b  

^a University of Illinois at Chicago   (United States)

^b UNIVERSITY OF ILLINOIS AT CHICAGO   (United States)

Author keywords

Logic Replication; Placement; Programmable Logic; Timing Optimization

Indexed keywords

LOGIC REPLICATION; PLACEMENT; TIMING OPTIMIZATION;

ALGORITHMS; DYNAMIC PROGRAMMING; FLIP FLOP CIRCUITS; OPTIMIZATION; PROBLEM SOLVING; PROGRAMMABLE LOGIC CONTROLLERS; ROUTERS; TREES (MATHEMATICS);

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 4444379635     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DAC.2004.240527     Document Type: Conference Paper

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