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Volumn , Issue , 1998, Pages 26-33
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Wireplanning in logic synthesis
a a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTER AIDED NETWORK ANALYSIS;
ELECTRIC NETWORK SYNTHESIS;
INTERCONNECTION NETWORKS;
LOGIC SYNTHESIS;
COMPUTER AIDED LOGIC DESIGN;
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EID: 0032307331
PISSN: 10923152
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1145/288548.288556 Document Type: Conference Paper |
Times cited : (28)
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References (16)
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