Algorithms for optimal introduction of redundant logic for timing and area optimization

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 4, Issue , 1996, Pages 452-455

  Lillis, John ^a   Cheng, Chung Kuan ^a   Lin, Ting Ting Y ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; CONSTRAINT THEORY; LOGIC DESIGN; OPTIMIZATION; POLYNOMIALS; REDUNDANCY; TREES (MATHEMATICS); VLSI CIRCUITS;

REDUNDANT LOGIC; SHORTEST PATHS COMPUTATION;

LOGIC GATES;

EID: 0029696347     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)