Real-time image processing with a compact FPGA-based systolic architecture

Real-Time Imaging

Volumn 10, Issue 3, 2004, Pages 177-187

  Torres Huitzil, César ^a   Arias Estrada, Miguel ^a  

^a INSTITUTO NACIONAL DE ASTROFÍSICA   (Mexico)

Author keywords

[No Author keywords available]

Indexed keywords

GIGA OPERATIONS PER SECOND (GOP); REAL-TIME IMAGE PROCESSING SYSTEMS; SINGLE INSTRUCTION MULTIPLE DATA (SIMD); SYSTOLIC ARCHITECTURE;

ALGORITHMS; COMPUTER ARCHITECTURE; FEATURE EXTRACTION; FIELD PROGRAMMABLE GATE ARRAYS; MATHEMATICAL MODELS; REAL TIME SYSTEMS; RESOURCE ALLOCATION; ROBOTICS; VIRTUAL REALITY;

IMAGE PROCESSING;

EID: 4444342086     PISSN: 10772014     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.rti.2004.06.001     Document Type: Article

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