Scalable selector architecture for X-tolerant deterministic BIST

Proceedings - Design Automation Conference

Volumn , Issue , 2004, Pages 934-939

  Wohl, Peter ^a   Waicukauski, John A ^a   Patel, Sanjay ^a  

^a SYNOPSYS INC   (United States)

Author keywords

Test data compression; Test generation (ATPG)

Indexed keywords

AUTOMATIC TEST PATTERN GENERATION (ATPG); DESIGN UNDER TEST (DUT); ON-CHIP COMPRESSION; TEST-DATA COMPRESSION;

ALGORITHMS; DATA COMPRESSION; DATA REDUCTION; ELECTRONIC DOCUMENT IDENTIFICATION SYSTEMS; EMBEDDED SYSTEMS; FAULT TOLERANT COMPUTER SYSTEMS; MICROPROCESSOR CHIPS; PATTERN RECOGNITION; SYSTEMS ANALYSIS;

COMPUTER ARCHITECTURE;

EID: 4444230239     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DAC.2004.239784     Document Type: Conference Paper

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